參數(shù)資料
型號: MB95F564KPF-G-JNE2
廠商: Fujitsu Semiconductor America Inc
文件頁數(shù): 80/84頁
文件大?。?/td> 0K
描述: IC MCU 8BIT 20KB FLASH 20TSSOP
標(biāo)準(zhǔn)包裝: 1,225
系列: 8FX MB95560H
核心處理器: F²MC-8FX
芯體尺寸: 8-位
速度: 16MHz
連通性: LIN,UART/USART
外圍設(shè)備: LVD. POR,PWM,WDT
輸入/輸出數(shù): 17
程序存儲器容量: 20KB(20K x 8)
程序存儲器類型: 閃存
RAM 容量: 496 x 8
電壓 - 電源 (Vcc/Vdd): 2.4 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 6x8/10b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 20-SOIC(0.295",7.50mm 寬)
包裝: 托盤
其它名稱: 865-1239
2010 Microchip Technology Inc.
DS70135G-page 81
dsPIC30F4011/4012
12.0
INPUT CAPTURE MODULE
This section describes the input capture module and
associated operational modes. The features provided by
this module are useful in applications requiring
frequency (period) and pulse measurement. Figure 12-1
depicts a block diagram of the input capture module.
Input capture is useful for such modes as:
Frequency/Period/Pulse Measurements
Additional Sources of External Interrupts
The key operational features of the input capture
module are:
Simple Capture Event mode
Timer2 and Timer3 mode selection
Interrupt on input capture event
These operating modes are determined by setting the
appropriate bits in the ICxCON register (where x = 1, 2,
...N). The dsPIC30F4011/4012 devices have four
capture channels.
FIGURE 12-1:
INPUT CAPTURE MODE BLOCK DIAGRAM
Note:
This data sheet summarizes features of
this group of dsPIC30F devices and is not
intended to be a complete reference
source. For more information on the CPU,
peripherals,
register
descriptions
and
general device functionality, refer to the
dsPIC30F
Family
Reference
Manual
(DS70046). For more information on the
device instruction set and programming,
refer to the “16-bit MCU and DSC
Reference Manual” (DS70157).
Note:
The dsPIC30F4011/4012 devices have
four capture inputs: IC1, IC2, IC7 and IC8.
The naming of these four capture chan-
nels is intentional and preserves software
compatibility with other dsPIC Digital
Signal Controllers.
ICxBUF
Prescaler
ICx
ICM<2:0>
Mode Select
3
Note:
Where ‘x’ is shown, reference is made to the registers or bits associated to the respective input capture
channels 1 through N.
10
Set Flag
Pin
ICxIF
ICTMR
T2_CNT
T3_CNT
Edge
Detection
Logic
Clock
Synchronizer
1, 4, 16
From Timer Module
16
FIFO
R/W
Logic
ICI<1:0>
ICBNE, ICOV
ICxCON
Interrupt
Logic
Set Flag
ICxIF
Data Bus
相關(guān)PDF資料
PDF描述
MB96F326RSBPMC-GSE2 IC MCU FLASHK/ROM MEMORY 80LQFP
MB96F338RSAPMC-GSE2 IC MCU FLASH 32KB RAM 144LQFP
MB96F348RSBPMC-GSE2 IC MCU 544KB FLASH/ROM 100LQFP
MB96F356RSBPMC-GSE2 IC MCU 288KB FLASH/ROM 64LQFP
MB96F386RSBPMC-GSE2 IC MCU 288KB FLASH/ROM 120LQFP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MB95F636HP-ES-SH-SNE2 制造商:FUJITSU 功能描述:8-bit MCU
MB95F636HPMC-ES-SNE2 制造商:FUJITSU 功能描述:8-bit FX series microcontroller
MB95F636HWQN-ES-SNE1 制造商:FUJITSU 功能描述:8-bit MCU
MB95F636KP-ES-SH-SNE2 制造商:FUJITSU 功能描述:8-bit FX series microcontroller
MB95F636KPMC-ES-SNE2 制造商:FUJITSU 功能描述:8-bit FX series microcontroller