參數(shù)資料
型號： MB95F564KPF-G-JNE2
廠商： Fujitsu Semiconductor America Inc
文件頁數(shù)： 75/84頁
文件大?。?/td> 0K
描述： IC MCU 8BIT 20KB FLASH 20TSSOP
標(biāo)準(zhǔn)包裝： 1,225
系列： 8FX MB95560H
核心處理器： F²MC-8FX
芯體尺寸： 8-位
速度： 16MHz
連通性： LIN，UART/USART
外圍設(shè)備： LVD. POR，PWM，WDT
輸入/輸出數(shù)： 17
程序存儲器容量： 20KB（20K x 8）
程序存儲器類型： 閃存
RAM 容量： 496 x 8
電壓 - 電源 (Vcc/Vdd)： 2.4 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 6x8/10b
振蕩器型： 外部
工作溫度： -40°C ~ 85°C
封裝/外殼： 20-SOIC（0.295"，7.50mm 寬）
包裝： 托盤
其它名稱： 865-1239
2010 Microchip Technology Inc.
DS70135G-page 77
dsPIC30F4011/4012
11.0
TIMER4/5 MODULE
This section describes the second 32-bit general
purpose timer module (Timer4/5) and associated
operational modes. Figure 11-1 depicts the simplified
block
diagram
of
the
32-bit
Timer4/5
module.
and
illustrate
Timer4/5
configured as two independent 16-bit timers, Timer4
and Timer5, respectively.
The Timer4/5 module is similar in operation to the
Timer
2/3
module.
However,
there
are
some
differences, which are as follows:
The Timer4/5 module does not support the ADC
event trigger feature
Timer4/5 can not be utilized by other peripheral
modules such as input capture and output compare
The operating modes of the Timer4/5 module are
determined by setting the appropriate bit(s) in the 16-bit
T4CON and T5CON SFRs.
For 32-bit timer/counter operation, Timer4 is the least
significant word and Timer5 is the most significant word
of the 32-bit timer.
FIGURE 11-1:
32-BIT TIMER4/5 BLOCK DIAGRAM
Note:
This data sheet summarizes features of
this group of dsPIC30F devices and is not
intended to be a complete reference
source. For more information on the CPU,
peripherals,
register
descriptions
and
general device functionality, refer to the
dsPIC30F
Family
Reference
Manual
(DS70046). For more information on the
device instruction set and programming,
refer to the “16-bit MCU and DSC
Reference Manual” (DS70157).
Note:
Timer4 is a ‘Type B’ timer and Timer5 is a
‘Type C’ timer. Please refer to the
appropriate timer type in Section 24.0
of
this
document.
Note:
For 32-bit timer operation, T5CON control
bits are ignored. Only T4CON control bits
are used for setup and control. Timer4
clock and gate inputs are utilized for the
32-bit timer module, but an interrupt is
generated with the Timer5 Interrupt Flag
(T5IF) and the interrupt is enabled with the
Timer5 Interrupt Enable bit (T5IE).
TMR5
TMR4
T5IF
Equal
Comparator x 32
PR5
PR4
Reset
LSB
MSB
Event Flag
Note
1:
T4CK is not implemented and this line is tied to VSS.
2:
Timer configuration bit, T32 (T2CON<3>), must be set to ‘1’ for a 32-bit timer/counter operation. All control bits are
respective to the T4CON register.
Data Bus<15:0>
TMR5HLD
Read TMR4
Write TMR4
16
Q
QD
CK
TGATE(T4CON<6>)
(T4CON<6>)
TGATE
0
1
TON
TCKPS<1:0>
Prescaler
1, 8, 64, 256
2
TCY
TC
S
1 x
0 1
TG
A
T
E
0 0
Gate
Sync
T4CK(1)
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