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參數(shù)資料
| 型號： | MB91101APF-G-JNE1 |
| 廠商： | FUJITSU LTD |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 32-BIT, 50 MHz, RISC MICROCONTROLLER, PQFP100 |
| 封裝： | 14 X 20 MM, 3.35 MM HEIGHT, 0.65 MM PITCH, PLASTIC, QFP-100 |
| 文件頁數(shù)： | 90/100頁 |
| 文件大小： | 2083K |
| 代理商： | MB91101APF-G-JNE1 |
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MB91101 Series
DS07-16301-6E
9
*1: FPT-100P-M20
*2: FPT-100P-M06
(Continued)
Pin no.
Pin
name
Circuit
type
Description
LQFP*1
QFP*2
88
91
INT3
F
External interrupt request input pin
This pin is used for input during corresponding interrupt is enabled,
and it is necessary to disable output for other functions from this pin
unless such output is made intentionally.
SC2
UART2 clock I/O pin
Clock output is available when UART2 clock output is enabled.
PE3
Can be configured as the I/O port when INT3 and SC2 are not used.
This function is available when UART2 clock output is disabled.
87,
86
90,
89
DREQ0,
DREQ1
F
External transfer request input pins for DMA
These pins are used for input when external trigger is selected to
cause DMAC operation, and it is necessary to disable output for
other functions from these pins unless such output is made inten-
tionally.
PE4,
PE5
Can be configured as I/O ports when DREQ0, DREQ1 are not
used.
85
88
DACK0
F
External transfer request acknowledge output pin for DMAC (ch. 0)
This function is available when transfer request output for DMAC is
enabled.
PE6
Can be configured as the I/O port when DACK0 is not used.
This function is available when transfer request acknowledge out-
put for DMAC or DACK0 output is disabled.
84
87
DACK1
F
External transfer request acknowledge output pin for DMAC (ch. 1)
This function is available when transfer request output for DMAC is
enabled.
PE7
Can be configured as the I/O port when DACK1 is not used.
This function is available when transfer request output for DMAC or
DACK1 output is disabled.
76
79
SI0
F
UART0 data input pin
This pin is used for input during UART0 is in input operation, and it
is necessary to disable output for other functions from this pin un-
less such output is made intentionally.
TRG0
PWM timer external trigger input pin
This pin is used for input during PWM timer external trigger is in in-
put operation, and it is necessary to disable output for other func-
tions from this pin unless such output is made intentionally.
PF0
Can be configured as the I/O port when SI0 and TRG0 are not used.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MB91101APFR-G-JNE1 | 制造商:FUJITSU 功能描述: |
| MB91101APFV | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit RISC Microcontroller |
| MB91106 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit RISC Microcontroller |
| MB91106PF | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit RISC Microcontroller |
| MB91106PFV | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:32-bit RISC Microcontroller |
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