
224
CHAPTER 8 8/16-BIT TIMER/COUNTER
Figure 8.7-3 Operation of the Counter Function in the 16-bit Mode
Note:
When reading a value in the operating counter in the 16-bit mode, always read it twice and
check whether it is an appropriate value before using it.
Cleared by the program
T1IF register
External clock
Counter clear
STR1 bit
(STP1=0)
Counter value
0000
H
0001
H
0002
H
0003
H
1388
H
0000
H
0001
H
T1DR register (*1)
(Lower 8-bit setting value)
34
H
88
H
T2DR register (*1)
(Upper 8-bit setting value)
12
H
13
H
*1: May be set to a pre-specified value at pre-specified timing. When the counter is started or when
a match is detected, the data register setting value is loaded to the comparator data latch.
At this time, the counter is cleared.
Data setting (1234
H
)
Comparator data latch 1
(Lower 8-bit comparison value)
34
H
88
H
Comparator data latch 2
(Upper 8-bit comparison value)
12
H
13
H
Load
Load