174
CHAPTER 6 WATCHDOG TIMER
6.1
Overview of the Watchdog Timer
The watchdog timer is a 1-bit timer which accepts the output of either the timebase
timer operating with the main clock or the watch prescaler operating with the subclock
as the count clock. If the watchdog timer is not cleared for a specified period of time
after activation, CPU is reset.
I
Watchdog Timer Function
The watchdog timer is a counter against program runaway. Once the watchdog timer is
activated, it is necessary to continue clearing it periodically within a specified period of time. If
the watchdog timer is not cleared for a specified period of time, for example, because the
program slips into an endless loop, a watchdog reset of the four instruction cycles is generated
to CPU.
As the count clock of the watchdog timer, the output of either the timebase timer or watch
prescaler can be selected.
The interval time of the watchdog timer is as listed in Table 6.1-1 "Interval Time of the Watchdog
Timer". If the watchdog timer is not cleared, a watchdog reset occurs between the minimum
and maximum times. Clear the counter within the minimum time of this table.
For the minimum and maximum times of the interval time of the watchdog timer, see Section 6.4
"Operation of the Watchdog Timer"
Note:
The counter of the watchdog timer is cleared at the same time the timebase timer is cleared
(TBTC: TBR=0) in a state in which the output of the timebase timer is selected as the count
clock, or it is cleared at the same time the watch prescaler is cleared (WPCR: WCLR=0) in a
state in which the output of the watch prescaler is selected as the count clock. Thus, if the
counter (timebase timer or watch prescaler) used as the count clock is cleared repeatedly
within an interval time of the watchdog timer, the watchdog timer will not function.
Reference:
If a transition to the sleep mode, stop mode, or watch mode occurs, the counter of the
watchdog timer is cleared and will not operate until normal operation (RUN state) is
resumed.
Table 6.1-1 Interval Time of the Watchdog Timer
Count clock
Timebase timer output (for main
clock oscillation 10 MHz)
watch prescaler output (for
subclock oscillation 32. 768 kHz)
Minimum time
Approx. 209.7 ms
(*1)
500 ms
(*2)
maximum time
Approx. 419.4 ms
1000 ms
*1: Divide-by-two of the main clock oscillation (F
CH
) x count of the timebase timer (2
20
)
*2: Cycle of the subclock oscillation (F
CL
) x count of the watch prescaler (2
14
)