201
8.1 Overview of the 8/16-bit Timer/Counter
H
Example of calculating the interval time and the square wave frequency
Assuming the original oscillation of the main clock (F
CH
) as 10 MHz and the Timer 1 data
register (T1DR) value as "DDH (221)", calculate as follows the Timer 1 interval time as well as
the frequency of square waves that are output from the T01 pin when Timer 1 continuously
operates without changing this T1DR register value:
Note that the system clock control register (SYCC) is used to select the fastest clock (CS1, CS0
= 11
B
, 1 instruction cycle = 4/F
CH
) in the main clock mode (SCS=1).
Interval time = (2 x 4/F
CH
x (T1DR register value + 1)
= (8/10 MHz) x (221 + 1)
nearly equal to 177.6
μ
s
Output frequency = F
CH
/ (2 x 8 x (T1DR register value + 1))
= 10 MHz / (16 x 221 + 1))
nearly equal to 2.815 kHz
Table 8.1-2 Timer 1 Interval Time and Square Wave Output Range in the 8-bit Mode
Count clock cycle
Interval time
Square wave output range (Hz)
Internal count
clock
2t
inst
2t
inst
to 2
9
t
inst
2
5
t
inst
to 2
13
t
inst
2
9
t
inst
to 2
17
t
inst
1t
ext
to 2
8
t
ext
1/(2
2
t
inst
) to 1/(2
10
t
inst
)
1/(2
6
t
inst
) to 1/(2
14
t
inst
)
1/(2
10
t
inst
) to 1/(2
18
t
inst
)
1/(2t
ext
) to 1/(2
9
t
ext
)
32t
inst
512t
inst
External clock
1t
ext
Table 8.1-3 Timer 2 Interval Time and Square Wave Output Range in the 8-bit Mode
Count clock cycle
Interval time
Internal count
clock
2t
inst
2t
inst
to 2
9
t
inst
2
5
t
inst
to 2
13
t
inst
2
9
t
inst
to 2
17
t
inst
32t
inst
512t
inst
Table 8.1-4 Interval Time and Square Wave Output Range in the 16-bit Mode
Count clock cycle
Interval time
Square wave output range (Hz)
Internal count
clock
2t
inst
2t
inst
to 2
17
t
inst
2
5
t
inst
to 2
21
t
inst
2
9
t
inst
to 2
25
t
inst
1t
ext
to 2
16
t
ext
1/(2
2
t
inst
) to 1/(2
18
t
inst
)
1/(2
6
t
inst
) to 1/(2
22
t
inst
)
1/(2
10
t
inst
) to 1/(2
26
t
inst
)
1/(2t
ext
) to 1/(2
17
t
ext
)
32t
inst
512t
inst
External clock
1t
ext
t
inst
: Instruction cycle (influenced by the clock mode, etc.)
t
ext
: External clock cycle (1 t
ext
greater than or equal to 2 t
inst
)