參數(shù)資料
型號(hào)： MB86960APF-G
元件分類： 微控制器/微處理器
英文描述： 2 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP100
封裝： PLASTIC, QFP-100
文件頁(yè)數(shù)： 5/66頁(yè)
文件大?。?/td> 376K
代理商： MB86960APF-G
MB86960
13
CURRENTLY
AVAILABLE
FREE BUFFER
AREA
RECEIVE
BUFFER
RING
62 KBYTES
MAX
TRANSMIT
BUFFERS
RECEIVED
PACKET
n + 3
(LAST PART)
RECEIVED
PACKET n + 3
(FIRST PART)
RECEIVED
PACKET n
RECEIVED
PACKET n + 1
RECEIVED
PACKET n + 2
ONE OR TWO
TRANSMIT BUFFERS
NOTES
1. Length (L) = 8, 16, 32, or 64 Kbytes.
2. Transmit Size (T) = 2 (one bank), 4 (two banks), 8
(two banks), or 16 (two banks) Kbytes.
3. Receive packets are aligned on an eight byte
boundary
.
4. Each received packet is preceded by a four byte
packet header as follows:
Byte 0 – Packet Status
Byte 1 – Not Used
Byte 2 – Packet Size LSB’s
Byte 3 – Packet Size MSB’s
T
L
Figure 5. Buffer Memory Organization
As shown in Figure 5, the buffer memory is divided into
transmit and receive buffer areas. The partitioning of the
memory is programmable, allowing the system to be
configured with different proportions of space available
for the transmitter and receiver functions. By program-
ming the proportions, an optimum usage of the memory
can be selected, according to the demands of a particular
application.
The section of the memory used by the transmitter can be
configured as a single buffer 2 kilobytes long, or as a pair
of banks, each either 2, 4 or 8 kilobytes long. Within each
buffer or bank, one or more packets can be written by the
system until the available space is too small for another
packet. Once started, the transmitter will transmit all
packets in the buffer automatically before finishing with a
status update, and an interrupt if so enabled. With the
two-bank configurations, one bank can be transmitted
while the other is being loaded. Using dual buffers and
loading multiple packets for “packet chaining” gives the
highest rate of transmission. This will boost performance
for systems that require high throughput transmission.
NICE can be configured to operate with 8, 16, 32 or 64
kilobytes of total buffer memory size, including both
transmit and receive spaces. This memory partitioning
into transmit and receive sections is allocated by the
system software. The total size of the transmit buffer
space can be either 2, 4, 8 or 16 kilobytes. Immediately
following the transmit buffer space is the receive buffer
space, using the balance of the available memory.
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