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參數(shù)資料
| 型號： | MB86960APF-G |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 2 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, PQFP100 |
| 封裝： | PLASTIC, QFP-100 |
| 文件頁數(shù)： | 1/66頁 |
| 文件大小： | 376K |
| 代理商： | MB86960APF-G |
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FEATURES
Complies with international standards for Ethernet,
ISO/ANSI/IEEE 8802-3
Provides generic interface industry–standard micro-
processor busses (x86, 680x0, RISC)
20 Mbyte/second data transfer rate to/from the system
bus
High-performance packet buffer architecture pipe-
lines data for highest throughput
On-chip management control buffer pointers reduce
software overhead and improve performance
Efficient, configurable two bank transmit buffer and
ring receive buffer
High-speed burst and single transfer DMA
64-element hash table for multicast address filtering
Power down mode reduces power dissipation for
battery-powered equipment
High-speed, low-power CMOS technology
Available in 100-pin plastic quad flat package
GENERAL DESCRIPTION
The MB86960 Network Interface Controller with
Encoder/Decoder (NICE
) is a high-performance,
highly integrated monolithic device which incorporates
both network controller, complete with buffer manage-
ment, and Manchester encoder/decoder. The MB86960
allows implementation of adapter solutions with a
minimum of additional support chips. It can be combined
with a Fujitsu Plug and Play ISA Controller (MB86701
or MB86703) and a Universal Interface to 10BASE–T to
form a highly integrated PnP ready Ethernet adapter card.
The unique buffer management architecture of the
MB86960 allows packet data to access a buffer memory
area from the host and from the network media
simultaneously, with virtually no interaction. The
network controller updates all receive and transmit
pointers internally, thus reducing the software overhead
required to control these operations and maximize
performance. The NICE device has a partitionable 2, 4, 8,
or 16 kilobyte, two-bank, transmit buffer which allows
multiple data packets to be “chained” together and
transmitted to the network from a single transmit
command, thus allowing greater design flexibility and
throughput. Receive packets are captured in a ring buffer
which can be configured in various sizes from 4 to 62
kilobytes, depending on the
memory selected
and
amount allocated for the transmit buffer.
Possible configurations for the system bus interface
include I/O mapping, memory mapping and DMA
access, or a combination of these. With a 20 Mbyte/sec
bandwidth, the NICE system bus interface allows you to
use the full throughput capacity of its unique packet
buffering architecture. The NICE controller’s selectable
bus modes provide both big-and–little-endian byte
ordering, permitting an efficient data interface with most
microprocessors and higher-level protocols.
Implemented in Fujitsu’s high-speed, low-power CMOS
process, the MB86960 is supplied in a 100-pin plastic
quad flat package for surface mounting.
PIN CONFIGURATION
31
50
80
51
100
81
1
30
100–PIN
PLASTIC QUAD
FLAT PACK
(PQFP)
TOP VIEW
Revised November 1997
DATA SHEET
MB86960
NETWORK INTERFACE CONTROLLER
with ENCODER/DECODER (NICE)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MB86961A | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:UNIVERSAL INTERFACE FOR 10BASET |
| MB86961APD-G | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:UNIVERSAL INTERFACE FOR 10BASET |
| MB86961APF-G | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:UNIVERSAL INTERFACE FOR 10BASET |
| MB86965 | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:EtherCoupler ETHERNET CONTROLLER WITH 10BASE?T TRANSCEIVER |
| MB86965B | 制造商:FUJITSU 制造商全稱:Fujitsu Component Limited. 功能描述:EtherCoupler ETHERNET CONTROLLER WITH 10BASE?T TRANSCEIVER |
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