參數(shù)資料
型號: MAX1383ATP+T
廠商: Maxim Integrated Products
文件頁數(shù): 16/25頁
文件大小: 0K
描述: IC ADC 12BIT 1.25MSPS 20-TQFN
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 2,500
位數(shù): 12
采樣率(每秒): 1.25M
數(shù)據(jù)接口: DSP,MICROWIRE?,QSPI?,串行,SPI?
轉(zhuǎn)換器數(shù)目: 2
功率耗散(最大): 85.5mW
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 20-WQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 20-TQFN-EP(5x5)
包裝: 帶卷 (TR)
輸入數(shù)目和類型: 2 個單端,單極;2 個單端,雙極;1 個差分,單極;1 個差分,雙極
MAX1377/MAX1379/MAX1383
Dual, 12-Bit, 1.25Msps Simultaneous-Sampling
ADCs with Serial Interface
______________________________________________________________________________________
23
Wireless Communication
Use the MAX1377/MAX1379/MAX1383 in a variety of
wireless communication systems. These devices allow
precise, simultaneous sampling of the I and Q signals
of quadrature RF receiver systems. Figure 17 shows the
MAX1377 in a simplified quadrature system. The device
has a differential input option that allows either full dif-
ferential or psuedo-differential signals. The 2:1 input
mux allows measurement of RSSI and other system-
monitoring functions with this device.
Layout, Grounding, and Bypassing
For best performance, use PCBs with ground planes.
Ensure that digital and analog signal lines are separat-
ed from each other. Do not run analog and digital
(especially clock) lines parallel to one another or digital
lines underneath the ADC package.
Establish a single-point analog ground (star ground point)
at AGND, separate from the digital ground, DGND.
Connect all other analog grounds and DGND to this star
ground point for further noise reduction. The ground return
to the power supply for this ground should be low imped-
ance and as short as possible for noise-free operation.
See Figure 14.
High-frequency noise in the AVDD power supply affects
the ADC’s high-speed comparator. Bypass the supply
to the single-point analog ground with 0.01F and 10F
bypass capacitors. Minimize capacitor lead lengths for
best supply-noise rejection.
Definitions
Integral Nonlinearity
Integral nonlinearity (INL) is the deviation of the values
on an actual transfer function from a straight line. This
straight line can be either a best-straight-line fit or a line
drawn between the end points of the transfer function,
once offset and gain errors have been nulled. The static
linearity parameters for the MAX1377/MAX1379/
MAX1383 are measured using the end-points method.
Differential Nonlinearity
Differential nonlinearity (DNL) is the difference between
an actual step width and the ideal value of 1 LSB. A
DNL error specification of 1 LSB or less guarantees no
missing codes and a monotonic transfer function.
Aperture Jitter
Aperture jitter (tAJ) is the sample-to-sample variation in
the time between the samples.
Aperture Delay
Aperture delay (tAD) is the time defined between the
falling edge of CNVST and the instant when an actual
sample is taken.
Signal-to-Noise Ratio
For a waveform perfectly reconstructed from digital
samples, signal-to-noise ratio (SNR) is the ratio of full-
scale analog input (RMS value) to the RMS quantization
error (residual error). The theoretical minimum analog-
to-digital noise is caused by quantization error, and
results directly from the ADC’s resolution (N bits):
SNR = (6.02 x N + 1.76)dB
In reality, there are other noise sources besides quanti-
zation noise, including thermal noise, reference noise,
clock jitter, etc. Therefore, SNR is computed by taking
the ratio of the RMS signal to the RMS noise, which
includes all spectral components minus the fundamen-
tal, the first five harmonics, and the DC offset.
Signal-to-Noise Plus Distortion
Signal-to-noise plus distortion (SINAD) is the ratio of the
fundamental input frequency’s RMS amplitude to the
RMS equivalent of all other ADC output signals:
SINAD(dB) = 20 x log(SignalRMS/NoiseRMS)
Effective Number of Bits
Effective number of bits (ENOB) indicates the global
accuracy of an ADC at a specific input frequency and
sampling rate. An ideal ADC’s error consists of quanti-
MAX1377
QUADRATURE
TRANSMITTER
DSP
PROCESSING
VL
T/R
QUADRATURE
DEMODULATOR
12-BIT
ADC
DAC
I
DAC
AVDD
Q
12-BIT
ADC
VL
Figure 17. Quadrature Wireless-Communication System
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