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參數(shù)資料
| 型號： | MAX1383ATP+T |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 14/25頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 12BIT 1.25MSPS 20-TQFN |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 1.25M |
| 數(shù)據(jù)接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 功率耗散（最大）： | 85.5mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-WQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 20-TQFN-EP（5x5） |
| 包裝： | 帶卷 (TR) |
| 輸入數(shù)目和類型： | 2 個單端，單極；2 個單端，雙極；1 個差分，單極；1 個差分，雙極 |
MAX1377/MAX1379/MAX1383
Dual, 12-Bit, 1.25Msps Simultaneous-Sampling
ADCs with Serial Interface
______________________________________________________________________________________
21
For CPOL = 0 and CPHA = 0 or CPOL = 1 and CPHA =
1, the data is clocked into the C on the rising edge of
SCLK. For CPOL = 0 and CPHA = 1 or CPOL = 1 and
CPHA = 0, the data is clocked into the C on the falling
edge of SCLK. The MAX1377/MAX1379/MAX1383 are
compatible with all CPOL/CPHA configurations since
the data is valid on the falling and rising edge of SCLK.
QSPI
Unlike SPI, which requires two 8-bit reads to acquire
the 12 bits of data from the ADC, QSPI allows the mini-
mum number of clock cycles necessary to clock in the
data. The MAX1377/MAX1379/MAX1383 require 16
clock cycles from the C to clock out the 12 bits of
data. The conversion result contains three zeros fol-
lowed by the 12 data bits, and a trailing zero with the
data in the MSB-first format.
Three-Phase Motor Controller
The MAX1377/MAX1379/MAX1383 are ideally suited for
motor-control systems (Figure 16). The devices’ simulta-
neously sampled inputs eliminate the need for complicat-
ed DSP algorithms that realign sequentially sampled
data into a simultaneous sample set. The ±10V
(MAX1383) input allows for standard industrial inputs,
eliminating the need for voltage-scaling amplifiers.
MAX1377
MAX1379
MAX1383
I/O
SCK
MISO1
MISO2
SS
3V TO 5V
CNVST
SCLK
DOUT1
DOUT2
MAX1377
MAX1379
MAX1383
SCK
MISO1
MISO2
SS
3V TO 5V
CNVST
SCLK
DOUT1
DOUT2
MAX1377
MAX1379
MAX1383
I/O
SK
SI1
SI2
CNVST
SCLK
DOUT1
DOUT2
A) SPI
B) QSPI
C) MICROWIRE
CS
Figure 15. Common Serial-Interface Connections to the
MAX1377/MAX1379/MAX1383
SUPPLIES
AVDD
AGND
DGND
VDD
DIGITAL
CIRCUITRY
OPTIONAL
FERRITE
BEAD
ANALOG
SUPPLY
RETURN
DIGITAL
SUPPLY
VL
GND
MAX1377
MAX1379
MAX1383
Figure 14. Power-Supply Grounding and Bypassing
SCLK
DOUT_
tDHOLD
tDOUT
Figure 13. Data Valid and Hold Times
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