參數(shù)資料
型號: MAX1329BETL+
廠商: Maxim Integrated Products
文件頁數(shù): 70/78頁
文件大小: 0K
描述: IC DAS 12BIT 300KSPS 40-TQFN-EP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 50
系列: *
MAX1329/MAX1330
12-/16-Bit DASs with ADC, DACs, DPIOs, APIOs,
Reference, Voltage Monitors, and Temp Sensor
72
______________________________________________________________________________________
Using the Internal Reference and
Reference Buffers
The MAX1329/MAX1330 include a precision 2.5V internal
reference and two independent programmable buffers for
the ADC and DACs. See the ADC Control and DAC
Control registers to enable the internal reference and pro-
gram the buffers. The REFADJ output is fixed at 2.5V
(REFE = 1) and the REFADC and REFDAC connect to the
internal ADC reference input and the internal DAC refer-
ence inputs, respectively. These buffers can be pro-
grammed to output 1.25V, 2.048V, or 2.5V independent
of each other. This allows the dynamic range of the ADC
and DACs to be optimized or set differently. This is useful
if one of the reference voltages is needed to be approxi-
mately AVDD/2 to be used as an analog ground.
The flexibility of the reference circuit allows the internal
reference to be shutdown (REFE = 0) and an external
voltage reference applied to REFADJ. If either REFADC
or REFDAC requires a different or more accurate volt-
age, an external reference can be applied directly to
REFADC or REFDAC and the corresponding reference
buffer must be disabled.
Applying a Digital Filter to ADC Data Using
the 20-Bit Accumulator
The MAX1329/MAX1330 incorporate a 20-bit accumula-
tor that can sum up to 256 results of the 12-bit ADC
automatically. See the
ADC Accumulator Register sec-
tion to set the number of samples to be summed. Once
the accumulator is full, the ACF bit in the Status register
is asserted.
The accumulator provides a digital filtering sync func-
tion, with an effective data rate equal to fEDR = fS/n
where fS is the ADC sample rate and n is the number of
samples accumulated. There is a notch at every integer
multiple of fEDR. The following equation provides the
transfer function of the filter:
Figure 35 is a plot showing a notch at 60Hz by accumu-
lating 256 samples at 15.36ksps.
The final step is to read the data in the ADC Accumulator
register and divide by the number of samples that were
accumulated. Shift the data right for each binary multi-
ple of accumulated data. For example, for 256 samples
the data should be shifted right eight times.
Increasing ADC Resolution using the
Accumulator with Dither
The MAX1329/MAX1330 incorporate an internal dither
function that can be used along with the 20-bit accumu-
lator to easily increase the resolution of the 12-bit ADC
to up to 16 bits. The oversampling along with the dither
increases the resolution with the penalty of a lower
effective data rate. Use the following equation to deter-
mine the number of samples required to increase the
resolution by N number of bits:
Samples = 22N
To increase the resolution by 4 bits, from 12 to 16 bits,
256 samples are required. After accumulating the
required number of samples, read the data from the
ADC Accumulator register and shift right by 4 bits with
the 16 LSBs as the increased resolution result.
Hf
nf
f
nf
f
c
nf
f
s
()
sin
=
=
π
-50
-40
-45
-30
-35
-20
-25
-15
-5
-10
0
120 180
60
240 300 360 420 480
DIGITAL-FILTER TRANSFER FUNCTION
FREQUENCY (Hz)
FILTER
RESPONSE
(dB)
Figure 35. Plot of the Digital Filter with 60Hz Notch
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