- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄180243 > M7A3PE600-FFG256I FPGA, 600000 GATES, PBGA256 PDF資料下載
參數(shù)資料
| 型號： | M7A3PE600-FFG256I |
| 元件分類： | FPGA |
| 英文描述： | FPGA, 600000 GATES, PBGA256 |
| 封裝： | 1 MM PITCH, FBGA-256 |
| 文件頁數(shù)： | 96/168頁 |
| 文件大?。?/td> | 1335K |
| 代理商： | M7A3PE600-FFG256I |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁當(dāng)前第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁第157頁第158頁第159頁第160頁第161頁第162頁第163頁第164頁第165頁第166頁第167頁第168頁
ProASIC3E Flash Family FPGAs
A d v an c ed v0 . 5
2-21
SRAM and FIFO
ProASIC3E devices have embedded SRAM blocks along
the north and south sides of the device. To meet the
needs of high-performance designs, the memory blocks
operate strictly in synchronous mode for both read and
write operations. The read and write clocks are
completely independent, and each may operate at any
desired frequency less than or equal to 350 MHz.
4kx1, 2kx2, 1kx4, 512x9 (dual-port RAM—two
read, two write or one read, one write)
512x9, 256x18 (two-port RAM—one read and one
write)
Sync write, sync pipelined / nonpipelined read
The ProASIC3E memory block includes dedicated FIFO
control logic to generate internal addresses and external
flag
logic
(FULL,
EMPTY,
AFULL,
AEMPTY).
Block
diagrams of the memory modules are illustrated in
During RAM operation, addresses are sourced by the
user logic and the FIFO controller is ignored. In FIFO
mode, the internal addresses are generated by the FIFO
controller and routed to the RAM array by internal
MUXes. Refer to Figure 2-21 on page 2-23 for more
information about the implementation of the embedded
FIFO controller.
The ProASIC3E architecture enables the read and write
sizes of RAMs to be organized independently, allowing
for bus conversion. For example, the write side size can
be set to 256x18 and the read size to 512x9.
Both the write width and read width for the RAM blocks
can be specified independently with the WW (write
width) and RW (read width) pins. The different DxW
configurations are: 256x18, 512x9, 1kx4, 2kx2, and 4kx1.
Refer to the allowable RW and WW values supported for
each of the RAM macro types in Table 2-5 on page 2-24.
When widths of one, two, or four are selected, the ninth
bit is unused. For example, when writing nine-bit values
and reading four-bit values, only the first four bits and
the second four bits of each nine-bit value are
addressable for read operations. The ninth bit is not
accessible.
Conversely, when writing four-bit values and reading
nine-bit values, the ninth bit of a read operation will be
undefined. The RAM blocks employ little-endian byte
order for read and write operations.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| M7A3PE600-FFG484I | FPGA, 600000 GATES, PBGA484 |
| M7A3PE600-FFGG256I | FPGA, 600000 GATES, PBGA256 |
| M7A3PE600-FFGG484I | FPGA, 600000 GATES, PBGA484 |
| M7A3PE600-FPQ208I | FPGA, 600000 GATES, PQFP208 |
| M7A3PE600-FPQG208I | FPGA, 600000 GATES, PQFP208 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M7A5 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MEDIUM CURRENT SILICON RECTIFIERS |
| M7A9 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MEDIUM CURRENT SILICON RECTIFIERS |
| M7AFS600-1FG256 | 制造商:Microsemi Corporation 功能描述:FPGA FUSION 600K GATES 1282.05MHZ 130NM 1.5V 256FBGA - Trays 制造商:Microsemi SOC Products Group 功能描述:FPGA FUSION 600K GATES 1282.05MHZ 130NM 1.5V 256FBGA - Trays |
| M7AFS600-1FG256ES | 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:Actel Fusion Mixed-Signal FPGAs |
| M7AFS600-1FG256I | 制造商:Microsemi Corporation 功能描述:FPGA FUSION 600K GATES 1282.05MHZ 130NM 1.5V 256FBGA - Trays 制造商:Microsemi SOC Products Group 功能描述:FPGA FUSION 600K GATES 1282.05MHZ 130NM 1.5V 256FBGA - Trays |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。