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| 型號(hào)： | M66291GP |
| 元件分類： | 總線控制器 |
| 英文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQFP48 |
| 封裝： | LQFP-48 |
| 文件頁(yè)數(shù)： | 76/126頁(yè) |
| 文件大?。?/td> | 810K |
| 代理商： | M66291GP |
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MITSUBISHI <DIGITAL ASSP>
M66291GP
2. Registers
USB -49
Ver.1.0 Apr.9 2001
Note:
When the IVAL bit is set to “1”, make sure to set the EP0_PID bits to “00” before executing the aforesaid
operations.
This bit automatically returns to “0” after the buffer is cleared.
Note:
Refer to “3.2 FIFO Buffer” for CPU/SIE side.
Note:
In case the transmit data exists in the buffer for EP0_FIFO, the buffer empty interrupt occurs in the concerned
endpoint when “1” is written to the BCLR bit.
(4) E0req (EP0_FIFO Ready) Bit (b11)
When this bit is equal to “1”, this bit indicates the states as follows:
EP0_FIFO Data Register can not be accessed.
The IVAL bit value of this register is invalid.
The ODLN bit values of this register are invalid.
Make sure that this bit is equal to “0” before accessing the aforesaid registers/bits.
(5) CCPL (Control Transfer Control) Bit (b10)
This bit controls the status stage of the control transfer.
When this bit is set to “1”, the operations below are executed at status stage of the control transfer and
notifies the normal completion of the control transfer:
lWhen set to control write transfer (ISEL bit = “0”)
Transmits the zero-length packet after receiving IN token if the EP0_PID bits are set to
“01”.
lWhen set to control read transfer (ISEL bit = “1”)
ACK response to the host after receiving the zero-length packet following OUT token if the
EP0_PID bits are set to “01”.
When this bit is set to “0”, NAK response is executed to the host after receiving the IN token/OUT token at
status stage of the control transfer.
This bit is automatically cleared to “0” by receiving the setup token.
(6) ODLN (Control Write Receive Data Length) Bits (b8~b0)
These bits are valid for control write transfer and indicate the data number (byte count) received from the
CPU side buffer.
Further, these bits are set to execute countdown when the EP0_FIFO Data Register is read out. This
operation changes according to the RCNT bit. For details, refer to “RCNT bit”.
These bits indicate the valid value when the E0req bit of this register is equal to “0”.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M66291GP#201 | 制造商:Renesas Electronics Corporation 功能描述:IC ASSP USB2.0 DEVICE CONTROLLER 48LQFP |
| M66291GP#RB0S | 功能描述:IC USB CONTROLLER GEN-PUR 48LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A |
| M66291GPRB0S | 制造商:Renesas Electronics Corporation 功能描述:USB2.0 Device Controller,LQFP48 |
| M66291HP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:ASSP (USB2.0 Device Controller) |
| M66291HP#200D | 功能描述:IC USB CONTROLLER GEN-PUR 52VQFN RoHS:否 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A |
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