
MITSUBISHI <DIGITAL ASSP>
M66291GP
2. Registers
USB -74
Ver.1.0 Apr.9 2001
2.39 EPi Configuration Registers 0 (i=1~6)
EP1 Configuration Register 0 (EP1_0CONFIG)
<Address : H’60>
EP2 Configuration Register 0 (EP2_0CONFIG)
<Address : H’64>
EP3 Configuration Register 0 (EP3_0CONFIG)
<Address : H’68>
EP4 Configuration Register 0 (EP4_0CONFIG)
<Address : H’6C>
EP5 Configuration Register 0 (EP5_0CONFIG)
<Address : H’70>
EP6 Configuration Register 0 (EP6_0CONFIG)
<Address : H’74>
b15
14
13
12
11
10
9876543
21
b0
EPi_TYP
EPi_DIR EPi_
ITMD
EPi_Buf_siz
EPi_
DBLB
EPi_
RWMD
EPi_Buf_Nmb
0
00000000000
000
-
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-
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<H/W reset : H'0000>
<S/W reset : ->
<USB bus reset : ->
b
Bit name
Function
R
W
15~14
EPi_TYP
Transfer Type
00 : Invalid
01 : Bulk transfer
10 : Interrupt transfer
11 : Isochronous transfer
13
EPi_DIR
Transfer Direction
0 :
OUT buffer (Receives data from the host)
1 :
IN buffer (Transmits data to the host)
12
EPi_ITMD
Interrupt Toggle Mode
0 :
Enable data resend function (normal toggle mode)
1 :
Disable data resend function (forced toggle mode)
11~8
EPi_Buf_siz
Buffer Size
Endpoint buffer size
7
EPi_DBLB
Double Buffer Mode
0 :
Single buffer mode
1 :
Double buffer mode
6EPi_RWMD
Continuous Transmit/Receive Mode
0 :
Single transmit /receive mode
1 :
Continuous transmit/receive mode
5~0
EPi_Buf_Nmb
Buffer Start Number
The top block number of buffer
(1) EPi_TYP (Transfer Type) Bits (b15~b14)
These bits are used to set the transfer type of the endpoint.
(2) EPi_DIR (Transfer Direction) Bit (b13)
This bit is used to set the transfer direction of the endpoint.
After switching the transfer direction, clear the buffer by the BCLR bit.
(3) EPi_ITMD (Interrupt Toggle Mode) Bit (b12)
This bit sets the enable/disable of data resend function at interrupt transfer.
This bit can be set to “1” only when the transfer type is set to interrupt transfer (EPi_TYP bits = “10”). Set
this bit to “0” for other transfer modes.
When the data resend function is set to disable, the new data is transmitted at the next transmission by
toggling the DATA PID and the buffer, even if the ACK is not received after transmitting the data at
interrupt transfer. Here, the IVAL bit is cleared to “0” and the EPB_RDY bit is set to “1” (buffer ready
interrupt has occurred).
When the data resend function is set to enable, the normal toggle sequence is executed. When the
transmission completes normally, the DATA PID and the buffer got toggled to transmit the next data. In
case ACK cannot be received after the data is transmitted, the DATA PID and the buffer do not get toggle,
and the same data in the buffer is resent.