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參數(shù)資料
| 型號： | M5XXLFXI |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | 時鐘及定時 |
| 英文描述： | 500 SERIES, PLL BASED CLOCK DRIVER, 3 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), QCC16 |
| 封裝： | 3 X 3 MM, 0.60 MM HEIGHT, LEAD FREE, MO-220, QFN-16 |
| 文件頁數(shù)： | 14/14頁 |
| 文件大?。?/td> | 312K |
| 代理商： | M5XXLFXI |
MoBL Clock
M200/M500
Document #: 001-29139 Rev. *A
Page 9 of 14
DC Electrical Specifications
The DC Electrical Specification table for MoBL Clock M2xx/M5xx family (VDD_CLKX = 1.5V/1.8V/2.5V/3.0/3.3V).
Parameter
Description
Conditions
Min
Typ
Max
Unit
VOL
Output Low Voltage
IOL = 2 mA, drive strength = [00]
–
0.4
V
IOL = 3 mA, drive strength = [01]
IOL = 7 mA, drive strength = [10]
IOL = 12 mA, drive strength = [11]
VOH
Output High Voltage
IOH = –2 mA, drive strength = [00]
VDD_CLKX –
0.4
––
V
IOH = –3 mA, drive strength = [01]
IOH = –7 mA, drive strength = [10]
IOH = –12 mA, drive strength = [11]
VOLSD
Output Low Voltage, SDA
IOL = 4 mA
–
0.4
V
VIL1
Input Low Voltage of PD#/OE,
SDA and SCL pins
––
0.2*VDD
V
VIL2
Input Low Voltage of EXCLKIN
pin
––
0.1*VDD
V
VIH1
Input High Voltage of PD#/OE,
SDA and SCL pins
0.8*VDD
––
V
VIH2
Input High Voltage of EXCLKIN
for MoBL Clock M5xx
0.9*VDD
––
V
VIH3
Input High Voltage of EXCLKIN
pin MoBL Clock M2xx
0.9*VDD
–2.2
V
IIH
Input High Current, PD#/OE
VIH = VDD
–
10
A
IIL
Input Low Current, PD#/OE
VIL = 0V
–
10
A
RDN
Pull Down Resistor of clocks
(CLK1-CLK3) in off-state
Clock outputs in off-state by setting
PD# = Low
100
160
250
k
Ω
IDD
[1,2]
Supply Current
All outputs running, CLOAD = 0
–
15
–
mA
IDDS
Standby Current
PD# = Low,
I2C circuit not in Keep
Alive Mode
–3
–
A
CIN
[2]
Input Capacitance
SCL, SDA, and PD#/OE inputs
–
7
pF
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