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參數(shù)資料
| 型號： | M74ACT02M |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 門電路 |
| 英文描述： | ACT SERIES, QUAD 2-INPUT NOR GATE, PDSO14 |
| 封裝： | SOP-14 |
| 文件頁數(shù)： | 1/8頁 |
| 文件大小： | 59K |
| 代理商： | M74ACT02M |
74ACT02
QUAD 2-INPUT NOR GATE
May 2000
s
HIGH SPEED: tPD = 5 ns (TYP.) at VCC =5V
s
LOW POWER DISSIPATION:
ICC =4
A (MAX.) at TA =25 oC
s
COMPATIBLE WITH TTL OUTPUTS
VIH =2V (MIN), VIL = 0.8V (MAX)
s
50
TRANSMISSION LINE DRIVING
CAPABILITY
s
SYMMETRICAL OUTPUT IMPEDANCE:
|IOH|=IOL = 24 mA (MIN)
s
BALANCED PROPAGATION DELAYS:
tPLH
tPHL
s
OPERATING VOLTAGE RANGE:
VCC (OPR) = 4.5V to 5.5V
s
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 02
s
IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The ACT02 is an advanced high-speed CMOS
QUAD 2-INPUT NOR GATE fabricated with
sub-micron silicon gate and double-layer metal
wiring C
2MOS technology. It is ideal for low
power
applications
mantaining
high
speed
operation similar to equivalent Bipolar Schottky
TTL.
The internal circuit is composed of 3 stages
including buffer output, which enables high noise
immunity and stable output.
The device is designed to interface directly High
Speed CMOS systems with TTL, NMOS and
CMOS output voltage levels.
All inputs
and
outputs are
equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
SOP
DIP
TSSOP
ORDER CODES
PACKAGE
T UBE
T & R
DIP
M74ACT02B
SOP
M74ACT02M
M74ACT02MTR
TSSOP
M74ACT02TTR
1/8
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| M74ACT02TTR | ACT SERIES, QUAD 2-INPUT NOR GATE, PDSO14 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M74ACT02MTR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:QUAD 2-INPUT NOR GATE |
| M74ACT02TTR | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:QUAD 2-INPUT NOR GATE |
| M74ACT251D | 制造商:ON Semiconductor 功能描述: |
| M74ACT574B | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUT NON INVERTING |
| M74ACT574M | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUT NON INVERTING |
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