
INPUT/OUTPUT PORTS AND PIN FUNCTIONS
8
8-35
32192/32195/32196 Group Hardware Manual
Rev.1.10 REJ09B0123-0110 Apr.06.07
Port Group 0,1 Output Drive Capability Setting Register (PG01DRV)
<Address: H'0080 0508>
Port Group 3 Output Drive Capability Setting Register (PG3DRV)
<Address: H'0080 0509>
Port Group 4,5 Output Drive Capability Setting Register (PG45DRV)
<Address: H'0080 050A>
Port Group 6,7 Output Drive Capability Setting Register (PG67DRV)
<Address: H'0080 050B>
Note: The PG8DRV register bits 4–7 have no functions assigned.
Port Group 8 Output Drive Capability Setting Register (PG8DRV)
<Address: H'0080 050C>
Note: The PG3DRV register bits 8–14 have no functions assigned.
<Upon exiting reset: H’00>
b
Bit Name
Function
R
W
0–2
No function assigned. Fix to "0."
00
(8–10)
3 (11)
GnDSEL (Note 1)
0: 50%
R
W
Group n output drive capability select bit
1: 100%
4–6
No function assigned. Fix to "0."
00
(12–14)
3 (15)
GnDSEL (Note 1)
0: 50%
R
W
Group n output drive capability select bit
1: 100%
Note 1:The 50% drive capability is equivalent to that of the M32R/ECU Series without the port output drive capability setting
function.
Note : For the P70/CLKOUT/WR#/BCLK pin, the drive capability can be set to one of four capability levels by using the P70 Output
Drive Capability Setting Register. Note that 50% of GnDSEL bit and 50% of P70DSEL bit drive capabilities are equivalent.
8.5 Port Output Drive Capability Setting Function
b0
12
3456
b7
G0DSEL
G1DSEL
000
0000
0
b8
9
10
11121314
b15
G3DSEL
000
0000
0
b0
123456
b7
G4DSEL
G5DSEL
0000000
0
b8
9
10
11121314
b15
G6DSEL
G7DSEL
000
00000
b0
12
3456
b7
G8DSEL
000
0000
0