參數(shù)資料
型號(hào)： M13S128324A-5BG
廠商： Electronic Theatre Controls, Inc.
英文描述： Modify typing error of Pin Arrangement
中文描述： 修改輸入錯(cuò)誤的管腳配置
文件頁(yè)數(shù)： 20/48頁(yè)
文件大?。?/td> 803K
代理商： M13S128324A-5BG
ES MT
M13S128324A
Elite Semiconductor Memory Technology Inc.
Publication Date : Mar. 2006
Revision : 1.0 20/48
Write Interrupted by a Write
A Burst Write can be interrupted before completion of the burst by a new Write command, with the only restriction that the
interval that separates the commands must be at least one clock cycle. When the previous burst is interrupted, the remaining
addresses are overridden by the new address and data will be written into the device until the programmed burst length is satisfied.
<Burst Length = 4>
The following functionality establishes how a Write command may interrupt a Read burst.
1. For Write commands interrupting a Read burst, a Read burst, a Burst Terminate command is required to stop the read burst
and tristate the DQ bus prior to valid input write data. Once the Burst Terminate command has been issued, the minimum
delay to a Write command = RU(CL) [CL is the CAS Latency and RU means round up to the nearest integer].
2. It is illegal for a Write command to interrupt a Read with autoprecharge command.
0
1
2
3
4
5
6
7
8
COMMAND
DQS
DQ's
NOP
NO P
NOP
NO P
NOP
NOP
Din A
0
WRITE A
Din A
1
Din B
0
Din B
1
Din B
2
Din B
3
1t
C K
NOP
WRITE B
CLK
CL K
t
C C D
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參數(shù)描述
M13S128324A-5BIG 制造商:ESMT 制造商全稱(chēng):Elite Semiconductor Memory Technology Inc. 功能描述:1M x 32 Bit x 4 Banks Double Data Rate SDRAM
M13S128324A-5LG 制造商:ESMT 制造商全稱(chēng):Elite Semiconductor Memory Technology Inc. 功能描述:1M x 32 Bit x 4 Banks Double Data Rate SDRAM
M13S128324A-5LIG 制造商:ESMT 制造商全稱(chēng):Elite Semiconductor Memory Technology Inc. 功能描述:1M x 32 Bit x 4 Banks Double Data Rate SDRAM
M13S128324A-6BG 制造商:ESMT 制造商全稱(chēng):Elite Semiconductor Memory Technology Inc. 功能描述:1M x 32 Bit x 4 Banks Double Data Rate SDRAM
M13S128324A-6BIG 制造商:ESMT 制造商全稱(chēng):Elite Semiconductor Memory Technology Inc. 功能描述:1M x 32 Bit x 4 Banks Double Data Rate SDRAM
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