- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄376119 > M13S128324A-5BG (Electronic Theatre Controls, Inc.) Modify typing error of Pin Arrangement PDF資料下載
參數(shù)資料
| 型號： | M13S128324A-5BG |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Modify typing error of Pin Arrangement |
| 中文描述： | 修改輸入錯誤的管腳配置 |
| 文件頁數(shù)： | 16/48頁 |
| 文件大?。?/td> | 803K |
| 代理商： | M13S128324A-5BG |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁當前第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁
ES MT
M13S128324A
Elite Semiconductor Memory Technology Inc.
Publication Date : Mar. 2006
Revision : 1.0 16/48
Essential Functionality for DDR SDRAM
Burst Read Operation
Burst Read operation in DDR SDRAM is in the same manner as the current SDRAM such that the Burst read command is
issued by asserting CS and CAS low while holding RAS and
WE
high at the rising edge of the clock (CLK) after t
RCD
from
the bank activation. The address inputs determine the starting address for the Burst, The Mode Register sets type of burst
(Sequential or interleave) and burst length (2, 4, 8). The first output data is available after the CAS Latency from the READ
command, and the consecutive data are presented on the falling and rising edge of Data Strobe (DQS) adopted by DDR SDRAM
until the burst length is completed.
<Burst Length = 4, CAS Latency = 3>
0
1
2
3
4
5
6
7
8
CO MMAND
READ A
NOP
NO P
NOP
NO P
NOP
NOP
NOP
NO P
CL K
CL K
CAS L at enc y =3
DQS
DQ' s
D o u t0 Do u t 1 Do u t2 D o u t3
相關PDF資料 |
PDF描述 |
|---|---|
| M13S128324A-6BG | Modify typing error of Pin Arrangement |
| M1512 | 8 FUNCTIONS 5 LED FLASH IC |
| M1632 | Liquid Crystal Display Modules |
| M1641 | Liquid Crystal Display Modules |
| M170EG01VA | 17.0” SXGA Color TFT-LCD |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| M13S128324A-5BIG | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:1M x 32 Bit x 4 Banks Double Data Rate SDRAM |
| M13S128324A-5LG | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:1M x 32 Bit x 4 Banks Double Data Rate SDRAM |
| M13S128324A-5LIG | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:1M x 32 Bit x 4 Banks Double Data Rate SDRAM |
| M13S128324A-6BG | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:1M x 32 Bit x 4 Banks Double Data Rate SDRAM |
| M13S128324A-6BIG | 制造商:ESMT 制造商全稱:Elite Semiconductor Memory Technology Inc. 功能描述:1M x 32 Bit x 4 Banks Double Data Rate SDRAM |
發(fā)布緊急采購，3分鐘左右您將得到回復。