參數(shù)資料
型號: LU3X54FTL
廠商: Lineage Power
英文描述: Quad-FET for 10Base-T/100Base-TX/FX(應用于10基數(shù)-T和100基數(shù)-TX/FX的四快速以太網(wǎng)收發(fā)器)
中文描述: 四為10Base-T/100Base-TX/FX場效應晶體管(應用于10基數(shù)- T的和100基數(shù)-TX/FX的四快速以太網(wǎng)收發(fā)器)
文件頁數(shù): 34/52頁
文件大小: 669K
代理商: LU3X54FTL
LU3X54FTL
QUAD-FET for 10Base-T/100Base-TX/FX
Data Sheet
July 2000
34
Lucent Technologies Inc.
MII Station Management
(continued)
Table 15. MR5—Autonegotiation Link Partner (LP) Ability Register (Base Page) Bit Descriptions
1. Note that the format for the bit descriptions is as follows: the first number is the register number, the second number is the bit position in the
register, and the name of the instantiated pad is in capital letters.
2. R = read.
Table 16. MR5—Autonegotiation Link Partner (LP) Ability Register (Next Page) Bit Descriptions
1. Note that the format for the bit descriptions is as follows: the first number is the register number, the second number is the bit position in the
register, and the name of the instantiated pad is in capital letters.
2. R = read.
Register/Bit
1
5.15 (LP_NEXT_PAGE)
Type
2
R
Description
Link Partner Next Page.
When this bit is set to 1, it indicates that the link
partner wishes to engage in next-page exchange.
Link Partner Acknowledge.
When this bit is set to 1, it indicates that the
link partner has successfully received at least three consecutive and consis-
tent FLP bursts.
Remote Fault.
When this bit is set to 1, it indicates that the link partner has
a fault.
Technology Ability Field.
This field contains the technology ability of the
link partner. These bits are similar to the bits defined for the MR4 register
(see Table 14).
Selector Field.
This field contains the type of message sent by the link part-
ner. For IEEE802.3u compliant link partners, this field should read 00001.
5.14 (LP_ACK)
R
5.13 (LP_REM_FAULT)
R
5.12:5
(LP_TECH_ABILITY)
R
5.4:0 (LP_SELECT)
R
Register/Bit
1
5.15 (LP_NEXT_PAGE)
Type
2
R
Description
Next Page.
When this bit is set to a logic 0, it indicates that this is the last
page to be transmitted. A logic 1 indicates that additional pages will follow.
Acknowledge.
When this bit is set to a logic 1, it indicates that the link
partner has successfully received its partner’s link code word.
Message Page.
This bit is used by the NEXT_PAGE function to differenti-
ate a message page (logic 1) from an unformatted page (logic 0).
Acknowledge 2.
This bit is used by the NEXT_PAGE function to indicate
that a device has the ability to comply with the message (logic 1) or not
(logic 0).
Toggle.
This bit is used by the arbitration function to ensure synchroniza-
tion with the link partner during next-page exchange. Logic 0 indicates that
the previous value of the transmitted link code word was logic 1. Logic 1
indicates that the previous value of the transmitted link code word was
logic 0.
Message/Unformatted Code Field.
With these 11 bits, there are 2048 pos-
sible messages. Message code field definitions are described in annex 28C of
the IEEE802.3u standard.
5.14 (LP_ACK)
R
5.13 (LP_MES_PAGE)
R
5.12 (LP_ACK2)
R
5.11 (LP_TOGGLE)
R
5.10:0 (MCF)
R
相關PDF資料
PDF描述
LU5X31F Gigabit Ethernet Transceiver(千兆位以太網(wǎng)收發(fā)器)
LUC4AB01 ATM Buffer Manager (ABM)(ATM緩沖管理器 (ABM))
LUC4AC01 ATM Crossbar Element (ACE)(ATM縱橫元件(ACE))
LUC4AS01 ATM Switch Element (ASX)(ATM開關元件)
LUC4AU01 ATM Layer UNI Manager (ALM)(ATM 層UNI管理器(ALM))
相關代理商/技術參數(shù)
參數(shù)描述
LU3X54FTLHS208 制造商:Alcatel-Lucent 功能描述:3X54FTLHS208
LU3X54FTL-HS208-DB 制造商:AGERE 制造商全稱:AGERE 功能描述:QUAD-FET for 10Base-T/100Base-TX/FX
LU3X54FTLHS208-DB 制造商:Alcatel-Lucent 功能描述:3X54FTLHS208-DB
LU400 制造商:MA-COM 制造商全稱:M/A-COM Technology Solutions, Inc. 功能描述:NEMA Cabinet Legs
LU400/D 制造商:OSRAM 功能描述:400W MOGUL BASED GENERAL LIGHTING HIGH PRESSURE SODIUM LAMP, COATED, DAYLIGHT, U