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參數(shù)資料
| 型號： | LM79CCVFX |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PQFP44 |
| 封裝： | 10 X 10 MM, PLASTIC, QFP-44 |
| 文件頁數(shù)： | 3/31頁 |
| 文件大?。?/td> | 469K |
| 代理商： | LM79CCVFX |
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Test Circuit
Functional Description
1.0 GENERAL DESCRIPTION
The LM79 provides 7 analog inputs, a temperature sensor, a
Delta-Sigma ADC (Analog-to-Digital Converter), 3 fan speed
counters, WATCHDOG registers, and a variety of inputs and
outputs on a single chip. Interfaces are provided for both the
ISA parallel bus or Serial Bus. The LM79 performs power
supply, temperature, and fan monitoring for personal com-
puters.
The LM79 continuously converts analog inputs to 8-bit digital
words with a 16 mV LSB (Least Significant Bit) weighting,
yielding input ranges of 0V to 4.096V. The two negative ana-
log inputs provide inverting op amps, with their non-inverting
input referred to ground. With additional external feedback
components, these inputs provide measurements of nega-
tive voltages (such as -5V and -12V power supplies). The
analog inputs are useful for monitoring several power sup-
plies present in a typical computer. Temperature is converted
to an 8-bit two’s-complement digital word with a 1C LSB.
Fan inputs measure the period of tachometer pulses from
the fans, providing a higher count for lower fan speeds. The
fan inputs are digital inputs with an acceptable range of 0V to
5V and a transition level of approximately 1.4V. Full scale fan
counts are 255 (8-bit counter) and this represents a stopped
or very slow fan. Nominal speeds, based on a count of 153,
are programmable from 1100 to 8800 RPM on FAN1 and
FAN2, with FAN3 fixed at 4400 RPM. Signal conditioning cir-
cuitry is included to accommodate slow rise and fall times.
The LM79 provides a number of internal registers, as de-
tailed in
Figure 6. These include:
Configuration Register:
Provides control and con-
figuration.
Interrupt Status Registers:
Two registers to provide
status of each WATCHDOG limit or Interrupt event.
Interrupt Mask Registers:
Allows masking of indi-
vidual Interrupt sources, as well as separate masking for
each of both hardware Interrupt outputs.
VID/Fan Divisor Registers:
A register to read the sta-
tus of the VID0-VID3 input lines. The high bits of this reg-
ister contain the divisor bits for FAN1 and FAN2 inputs.
Serial Bus Address Register:
Contains the Serial
Bus address. At power on it assumes the default value of
0101101 binary, and can be altered via the ISA or Serial
Bus interface.
Chip Reset/VID4/Device ID Register:
Allows resetting
of all the registers to the default power-on reset value.
The state of VID4 is reflected in this register. The identity
of the divice being used can be determined by reading
the state of the D7 of this register. An LM79 would be
identified when D7 is set high.
POST RAM:
FIFO RAM to store up to 32 bytes of 8-bit
POST codes. Overflow of the POST RAM will set an In-
terrupt. The POST RAM, located at base address x0h
and x4h, allows for easy decoding to address 80h and
84h, the normal addresses for outputting of POST codes.
Interrupt will only be set when writing to port x0h or x4h.
The POST RAM can be read via ports 85h and 86h.
Value RAM:
The monitoring results: temperature, volt-
ages, fan counts, and WATCHDOG limits are all con-
tained in the Value RAM. The Value RAM consists of a to-
tal of 64 bytes. The first 11 bytes are all of the results, the
next 19 bytes are the WATCHDOG limits, and are located
at 20h-3Fh, including two unused bytes in the upper loca-
tions. The next 32 bytes, located at 60h-7Fh, mirror the
first 32 bytes with identical contents. The only difference
in the upper bytes are that they auto-increment the LM79
Internal Address Register when read from or written to via
the ISA bus (auto-increment is not available for Serial
Bus communications).
When the LM79 is started, it cycles through each measure-
ment in sequence, and it continuously loops through the se-
quence approximately once every second. Each measured
value is compared to values stored in WATCHDOG, or Limit
registers. When the measured value violates the pro-
grammed limit the LM79 will set a corresponding Interrupt in
the Interrupt Status Registers. Two hardware Interrupt lines,
SMI and NMI/IRQ, are fully programmable with separate
masking of each Interrupt source, and masking of each out-
put. In addition, the Configuration Register has control bits to
enable or disable the hardware Interrupts.
Additional digital inputs are provided for chaining of SMI
(System Management Interrupt), outputs of multiple external
LM75 temperature sensors via the BTI (Board Temperature
Interrupt) input, and a Chassis Intrusion input. The Chassis
DS100036-8
FIGURE 5. Digital Output Load Circuitry
LM79
www.national.com
11
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