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參數(shù)資料
| 型號： | LM79CCVFX |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PQFP44 |
| 封裝： | 10 X 10 MM, PLASTIC, QFP-44 |
| 文件頁數(shù)： | 19/31頁 |
| 文件大?。?/td> | 469K |
| 代理商： | LM79CCVFX |
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Functional Description (Continued)
13.4 Interrupt Status Register 1 — Address 41h
Power on default <7:0> = 00h
Bit
Name
Read/Write
Description
0
IN0
Read Only
A one indicates a High or Low limit has been exceeded.
1
IN1
Read Only
A one indicates a High or Low limit has been exceeded.
2
IN2
Read Only
A one indicates a High or Low limit has been exceeded.
3
IN3
Read Only
A one indicates a High or Low limit has been exceeded.
4
Temperature
Read Only
A one indicates a High or Low limit has been exceeded.
5
BTI
Read Only
A one indicates an interrupt has occurred from the Board Temperature Interrupt (BTI)
input (O.S. output of multiple LM75 chips).
6
FAN1
Read Only
A one indicates the fan count limit has been exceeded.
7
FAN2
Read Only
A one indicates the fan count limit has been exceeded.
13.5 Interrupt Status Register 2 — Address 42h
Power on default <7:0> = 00h
Bit
Name
Read/Write
Description
0
IN4
Read Only
A one indicates a High or Low limit has been exceeded.
1
-IN5
Read Only
A one indicates a High or Low limit has been exceeded.
2
-IN6
Read Only
A one indicates a High or Low limit has been exceeded.
3
FAN3
Read Only
A one indicates the fan count limit has been exceeded.
4
Chassis Intrusion
Read Only
A one indicates Chassis Intrusion has gone high.
5
FIFO Overflow
Read Only
A one indicates an overflow in FIFO (POST RAM) i.e. 32nd location in FIFO has
been written via Port x0h or x4h.
6
SMI__IN
Read Only
A one indicates SMI__IN has gone low.
7
Reserved
Read Only
13.6 SMI Mask Register 1 — Address 43h
Power on default <7:0> = 00h
Bit
Name
Read/
Write
Description
0
IN0
Read/Write
A one disables the corresponding interrupt status bit for SMI interrupt.
1
IN1
Read/Write
A one disables the corresponding interrupt status bit for SMI interrupt.
2
IN2
Read/Write
A one disables the corresponding interrupt status bit for SMI interrupt.
3
IN3
Read/Write
A one disables the corresponding interrupt status bit for SMI interrupt.
4
Temperature
Read/Write
A one disables the corresponding interrupt status bit for SMI interrupt.
5
BTI
Read/Write
A one disables the corresponding interrupt status bit for SMI interrupt.
6
FAN1
Read/Write
A one disables the corresponding interrupt status bit for SMI interrupt.
7
FAN2
Read/Write
A one disables the corresponding interrupt status bit for SMI interrupt.
LM79
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