參數(shù)資料
型號(hào): LM79CCVFX
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 模擬信號(hào)調(diào)理
英文描述: SPECIALTY ANALOG CIRCUIT, PQFP44
封裝: 10 X 10 MM, PLASTIC, QFP-44
文件頁(yè)數(shù): 17/31頁(yè)
文件大?。?/td> 469K
代理商: LM79CCVFX
Functional Description (Continued)
REGISTERS AND RAM
13.1 Address Register (Port x5h)
The main register is the ADDRESS Register located at Port x5h. The bit designations are as follows:
Bit
Name
Read/
Write
Description
6-0
Address
Pointer
Read/Write
Address of RAM and Registers. See the tables below for detail.
7
Busy
Read
Only
A one indicates the device is busy because of a Serial Bus transaction or another ISA
bus transaction. With checking this bit, multiple ISA drivers can use LM79 without
interfering with each other or a Serial Bus driver.
It is the user’s responsibility not to have a Serial Bus and ISA bus operations at the
same time.
This bit is:
Set: with a write to Port x5h or when a Serial Bus transaction is in progress.
Reset: with a write or read from Port x6h if it is set by a write to Port x5h, or when the
Serial Bus transaction is finished.
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Busy
Address Pointer (Power On default 00h)
(Power On default 0)
A6
A5
A4
A3
A2
A1
A0
Address Pointer Index (A6–A0)
Registers and RAM
A6–A0 in
Hex
Power On Value of
Registers:
Notes
<7:0> in Binary
Configuration Register
40h
0000 1000
Interrupt Status Register 1
41h
0000 0000
Auto-increment to the address of Interrupt
Status Register 2 after a read or write to
Port x6h.
Interrupt Status Register 2
42h
0000 0000
SMI Mask Register 1
43h
0000 0000
Auto-increment to the address of SMI Mask
Register 2 after a read or write to Port x6h.
SMI Mask Register 2
44h
0000 0000
NMI Mask Register 1
45h
0000 0000
Auto-increment to the address of NMI Mask
Register 2 after a read or write to Port x6h.
NMI Mask Register 2
46h
0100 0000
VID/Fan Divisor Register
47h
<7:4> = 0101;
<3:0> = VID3–VID0
Serial Bus Address Register
48h
0010 1101
Chip Reset/VID4/Device ID
Register
49h
<7:1> =1100 000;
<0> = VID4
D7 identifies this device as the LM79. D0
reflects the state of VID4.
POST RAM
00–1Fh
Auto-increment to the next location after a
read or write to Port x6h and stop at 1Fh.
Value RAM
20–3Fh
Value RAM
60–7Fh
Auto-increment to the next location after a
read or write to Port x6h and stop at 7Fh.
LM79
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