參數(shù)資料
型號(hào)： LM4560VJD
廠商： NATIONAL SEMICONDUCTOR CORP
元件分類： 消費(fèi)家電
英文描述： Advanced PCI Audio Accelerator
中文描述： SPECIALTY CONSUMER CIRCUIT, PQFP100
封裝： PLASTIC, TQFP-100
文件頁(yè)數(shù)： 27/54頁(yè)
文件大小： 380K
代理商： LM4560VJD
3.0 Register Description
(Continued)
This register will show a flag which indicates the Bank B’s
current sample is in a range between ESO/2 to ESO or in a
range before ESO/2 (ESO is offset from loop begin to loop
end). And this flag will be used for sample data double buff-
ering control. Bit n is for channel n.
0: Before ESO/2
1: From ESO/2 to ESO
When channel n is stopped, bit n will be reset to ‘0’.
3.4.9.17 SBBL & SBCL (Sound Blaster Base Block
Length & Current Block Length)
Address:
AudioBase + C0h
Size:
32 bits
Type:
Read/Write
Default:
00000000h
SBBL(Bit 31–16) is sound blaster base block length
SBCL(Bit 15–0) is current value of sound blaster block
length counter
If sound blaster DMA loop is enabled (SBCTRL[3]=1), every
time when SBCL changed from 0 to FFFFh, a INT will be is-
sued, the contents of SBCL is reloaded from SBBL, and
DMA operation continues.
If sound blaster DMA loop is not enabled (SBCTRL[3]=0),
every time when SBCL changed from 0 to FFFFh, a INT will
be issued, the contents of SBCL is reloaded from SBBL, and
set LegacyCMD to 101(pause).
SBCTRL bit 7 is used to determine the counter operation
mode (byte count or word count). The counter is a count
down counter.
3.4.9.18 SBCTRL & SBE2R & SBDD (Sound Blaster
Control)
Address:
AudioBase + C4h
Size:
32 bits
Type:
Read/Write
Default:
00000000h
Description
SBE2R (Sound Blaster DMA Testing Byte Data
Register)
SBDD (Sound Blaster Direct Playback Date
Register)
SBCTRL (Sound Blaster Control)
SBE2R(Bit 31–24) is sound blaster DMA testing byte com-
mand data port (write only)
Any time after Bit 31–24 has ever been written, E2Status
(source from wave engine) will be set high. E2Status will be
cleared after the testing byte has been sent to the system lo-
cation.
SBDD(Bit 15–8) is sound blaster direct mode playback data
port
SBCTRL(Bit 7–0) is legacy sound blaster voice in/out control
register
Bit 7
0 8 bit data format
1 16 bit data format
Bit 6
0 mono
1 stereo
Bit 5
0 unsigned data format
1 signed data format
Bit 4
0 playback
1 recording
Bit 3 sound blaster DMA loop enable control
0 loop disabled.
1 loop enabled.
Bit 2..0 LegacyCMD
000 stop: No any operation. No contribution to Digital Mixer
001 run: Normal operation.
010 silent_DMA : SBCL will count; CA, CBC won’t count. No
data fetching. No interpolation. No contribution to Digital
Mixer
011 reserve
100 silent_SB : SBCL, CA & CBC will count as the same as
run mode. No data fetching. No interpolation. No contribution
to Digital Mixer
101 pause: SBCL, CA & CBC don’t change.
let SBALPHA unchanged, CACHE_HIT=1 drive current LD
(or LD_L, LD_R) to Digital Mixer
110 reserve
111 Direct_playback: SBCL, CA & CBC don’t change.
drive SBDD to Digital Mixer
All other bits are reserved bits.
3.4.9.19 STimer (Playback Sample Timer)
Address:
AudioBase + C8h
Size:
32 bits
Type:
Read/Write
Default:
00000000h
Bit 31–0 (STimer) will show current state of the sample timer
counter which will count up every f48k clock and will be reset
when RST_Stimer bit being written. Active high.
3.4.9.20 LFO_B And I2S_DELTA (Bank B Low
Frequency Oscillator Control)
Address:
AudioBase + CCh
Size:
32 bits
Type:
Read/Write
Default:
00000000h
Bit 31–27 Reserved–Read Only 00000b
Bit 26–16 is used for Bank B LFO control.
Bit 26 (LFO_E_B) is Bank B LFO enable bit.
0: disabled
1: enabled
Bits 25–24 (LFO_R_B) is clock rate select of Bank B LFO
counter.
00: LFO counter clock rate is 48 kHz
01: LFO counter clock rate is 48 kHz/4
10: LFO counter clock rate is 48 kHz/16
11: LFO counter clock rate is 48 kHz/64
Bits 23–16 (LFO_INIT_B)is the initial value of the Bank B
LFO counter which will count down to 0 then reload.
Bit 15–13 reserved.
Bit 12–0 (I2S_DELTA) (Read only) This register returns the
auto-detected DELTA of I2S input (f
i2s
/f
48k
).
www.national.com
27
相關(guān)PDF資料
PDF描述
LM4560 Advanced PCI Audio Accelerator
LM45BIM3 SOT-23 Precision Centigrade Temperature Sensors
LM45BIM3X SOT-23 Precision Centigrade Temperature Sensors
LM45B SOT-23 Precision Centigrade Temperature Sensors
LM4610 Dual DC Operated Tone/Volume/Balance Circuit with National 3-D Sound
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LM4562 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Dual High Performance, High Fidelity Audio Operational Amplifier
LM4562_07 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Dual High Performance, High Fidelity Audio Operational Amplifier
LM4562HA 制造商:Texas Instruments 功能描述:OP Amp Dual GP ??17V 8-Pin TO-99 Tray
LM4562HA/NOPB 功能描述:運(yùn)算放大器 - 運(yùn)放 RoHS:否 制造商:STMicroelectronics 通道數(shù)量:4 共模抑制比（最小值）:63 dB 輸入補(bǔ)償電壓:1 mV 輸入偏流（最大值）:10 pA 工作電源電壓:2.7 V to 5.5 V 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-16 轉(zhuǎn)換速度:0.89 V/us 關(guān)閉:No 輸出電流:55 mA 最大工作溫度:+ 125 C 封裝:Reel
LM4562HA/NOPB 制造商:Texas Instruments 功能描述:Operational Amplifier (Op-Amp) IC
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*