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參數(shù)資料
| 型號(hào)： | LM4560VJD |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類(lèi)： | 消費(fèi)家電 |
| 英文描述： | Advanced PCI Audio Accelerator |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP100 |
| 封裝： | PLASTIC, TQFP-100 |
| 文件頁(yè)數(shù)： | 10/54頁(yè) |
| 文件大?。?/td> | 380K |
| 代理商： | LM4560VJD |
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3.0 Register Description
(Continued)
0: (Default) Normal (PME is controlled by bit[8] PME_En)
1: PME can be asserted independent of bit[8] (PME_En).
Writing 0 to this bit has no effect.
Writing 1 to this bit will clear this bit, and also cause chip to
stop asserting PME.
Bit 14–13 (Data_Scale) Read only as 00b.
Bit 12–9 (Data_Select) Read only as 0000b.
Bit 8 (PME_En) Read/Write.
0: (Default) PME is disabled to be asserted.
1: PME is enabled to be asserted.
Bit 7–2 Reserved. Read only as 000000b.
Bit 1–0 (PM_ST) Power State. Read/Write.
Read will return current Power State, write will set to new
state.
00
D0
01
D1
10
D2
11
D3 hot
3.2 AUDIO PROCESSOR REGISTER MAP:
IO Offset
00h
04h
08h
0Ch
10h
14h
18h
1Ch
20h
24h–2Ch
30h
34h
38h
3Ch
40h
44h
48h
4Ch
50h
54h
58h
5Ch
60h
70h
74h
78h
7Ch
80h
84h
88h
8Ch
90h
94h
98h
9Ch
A0h
A4h
A8h
ACh
+3h
DMAR3
DMAR7
DMAR11
DMAR15
SBR3/SBR1
RSVD
RSVD
SBR10
MPUR3
RSVD
RSVD
GAMER2
GAMER3
RSVD
ACWR
ACRD
SCTRL
ACGPIO
ASR0
RSVD
ASR3
ASR6
AOPLSR0
SPDIF_CS
RSVD
SubSystem ID
PCI ID read
START_A
STOP_A
DLY
SIGN_CSO
CSPF_A
CEBC
AIN_A
EINT
GC
AINTEN_A
MUSICVOL
SBDELTA/SBDELTA_R
+2h
DMAR2
DMAR6
DMAR10
DMAR14
SBR2
SBR6
SBR7
SBR9
MPUR2
+1h
DMAR1
DMAR5
DMAR9
DMAR13
SBR1/SBR3
SBR5
RSVD
RSVD
MPUR1
+0h
DMAR0
DMAR4
DMAR8
DMAR12
SBR0
SBR4
RSVD
SBR8
MPUR0
RSVD
GAMER1
GAMER0
ASR2
RSVD
ASR1
ASR5
RSVD
ASR4
SubVendor ID
GPcontrol
GPO
GPI
CIR
WAVEVOL
RSVD
www.national.com
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