- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄385472 > LH7A404N0F000B3 (NXP Semiconductors N.V.) 32-Bit System-on-Chip PDF資料下載
參數(shù)資料
| 型號(hào)： | LH7A404N0F000B3 |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 數(shù)學(xué)處理器 |
| 英文描述： | 32-Bit System-on-Chip |
| 封裝： | LH7A404N0F000B3<SOT1021-1 (LFBGA324)|<<http://www.nxp.com/packages/SOT1021-1.html<1<Always Pb-free,;LH7A404N0F092B3<SOT1021-1 (LFBGA324)|<<http://www.nxp.com/packages/SOT |
| 文件頁數(shù)： | 69/75頁 |
| 文件大小： | 1109K |
| 代理商： | LH7A404N0F000B3 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁當(dāng)前第69頁第70頁第71頁第72頁第73頁第74頁第75頁
32-Bit System-on-Chip
LH7A404
Preliminary data sheet
69
NXP Semiconductors
Printed Circuit Board Layout Practices
LH7A404 POWER SUPPLY DECOUPLING
The LH7A404 has separate power and ground pins
for different internal circuitry sections. The VDD and
VSS pins supply power to I/O buffers, while VDDC and
VSSC supply power to the core logic, and VDDA/VSSA
supply analog power to the PLLs.
Each of the VDD and VDDC pins must be provided
with a low impedance path to the corresponding board
power supply. Likewise, the VSS and VSSC pins must be
provided with a low impedance path to the board ground.
Each power supply must be decoupled to ground
using at least one 0.1
μ
F high frequency capacitor
located as close as possible to a VDDx-VSSx pin pair
on each of the four sides of the chip. If room on the cir-
cuit board allows, add one 0.01
μ
F high frequency
capacitor near each VDDx-VSSx pair on the chip.
To be effective, the capacitor leads and associated
circuit board traces connecting to the chip VDDx-VSSx
pins must be kept to less than half an inch (12.7 mm)
per capacitor lead. There must be one bulk 10
μ
F
capacitor for each power supply placed near one side
of the chip.
REFERENCE PLL, VDDA, VSSA FILTER
The VDDA pins supply power to the chip PLL cir-
cuitry. VSSA is the ground return path for the PLL cir-
cuit. NXP recommends a low-pass filter attached as
shown in Figure 54. The values of the inductor and
capacitors are not critical. The low-pass filter prevents
high frequency noise from adversely affecting the PLL
circuits. The distance from the IC pin to the high fre-
quency capacitor should be as short as possible.
UNUSED INPUT SIGNAL CONDITIONING
Floating input signals can cause excessive power
consumption. Unused inputs without internal pull-up or
pull-down resistors should be pulled up or down exter-
nally, to tie the signal to its inactive state. NXP recom-
mends using no larger than 33 k
.
Some GPIO signals may default to inputs. If the pins
that carry these signals are unused, software can pro-
gram these signals as outputs, eliminating the need for
pull-ups or pull-downs. Power consumption may be
higher than expected until software completes pro-
gramming the GPIO. Some LH7A404 inputs have inter-
nal pull-ups or pull-downs. If unused, these inputs do
not require external conditioning.
OTHER CIRCUIT BOARD LAYOUT PRACTICES
All outputs have fast rise and fall times. Printed cir-
cuit trace interconnection length must therefore be
reduced to minimize overshoot, undershoot and reflec-
tions caused by transmission line effects of these fast
output switching times. This recommendation particu-
larly applies to the address and data buses.
When considering capacitance, calculations must
consider all device loads and capacitances due to the
circuit board traces. Capacitance due to the traces will
depend upon a number of factors, including the trace
width, dielectric material the circuit board is made from
and proximity to ground and power planes.
Attention to power supply decoupling and printed cir-
cuit board layout becomes more critical in systems with
higher capacitive loads. As these capacitive loads
increase, transient currents in the power supply and
ground return paths also increase.
Figure 54. VDDA, VSSA Filter Circuit
LH7A404-169
VDDAx
VDDC
V
SS
Ax
22
μ
F
VDDC
(
S
OURCE)
0.1
μ
F
+
LH7A404
10
μ
H
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LH7A404N0F092B3 | 32-Bit System-on-Chip |
| LLNRK | LLNRK/LLSRK Series POWR-PRO Class RK1 |
| LLZ4V7 | 500mW Hermetically Sealed Glass Zener Voltage Regulators |
| LLZ43V | 500mW Hermetically Sealed Glass Zener Voltage Regulators |
| LLZ47V | 500mW Hermetically Sealed Glass Zener Voltage Regulators |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LH7A404N0F000B3,55 | 功能描述:ARM微控制器 - MCU LCD,USB FS/HOST,MMU,ADC,BGA324 RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:72 MHz 程序存儲(chǔ)器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT |
| LH7A404N0F000B3,551 | 制造商:NXP Semiconductors 功能描述: |
| LH7A404N0F000B3;55 | 功能描述:ARM微控制器 - MCU LCD USB FS/HOST MMU RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:72 MHz 程序存儲(chǔ)器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT |
| LH7A404N0F000B3;55 | 制造商:NXP Semiconductors 功能描述:IC 32BIT MCU 200MHZ LFBGA-324 |
| LH7A404N0F000B3-S | 功能描述:ARM微控制器 - MCU ARM9 LCD USB HOST RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:72 MHz 程序存儲(chǔ)器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風(fēng)格:SMD/SMT |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。