參數(shù)資料
型號(hào): L6740LTR
廠(chǎng)商: 意法半導(dǎo)體
英文描述: Hybrid controller (4+1) for AMD SVID and PVID processors
中文描述: 混合控制器(4 1對(duì)AMD SVID和PVID)處理器
文件頁(yè)數(shù): 39/44頁(yè)
文件大?。?/td> 657K
代理商: L6740LTR
L6740L
LTB technology
39/44
10
LTB technology
LTB Technology further enhances the performances of Dual-Edge Asynchronous
Systems by reducing the system latencies and immediately turning ON all the phases to
provide the correct amount of energy to the load. By properly designing the LTB network as
well as the LTB Gain, the undershoot and the ring-back can be minimized also optimizing
the output capacitors count. LTB Technology applies only to the CORE Section.
LTB Technology monitors the output voltage through a dedicated pin detecting Load-
Transients with selected dV/dt, it cancels the interleaved phase-shift, turning-on
simultaneously all phases. it then implements a parallel, independent loop that reacts to
Load-Transients bypassing E/A latencies.
LTB Technology Control Loop is reported in
Figure 18
.
Figure 18.
LTB technology control loop (CORE section).
The LTB detector is able to detect output load transients by coupling the output voltage
through an R
LTB
- C
LTB
network. After detecting a load transient, the LTB Ramp is reset and
then compared with the COMP pin level. The resulting duty-cycle programmed is then OR-
ed with the PWMx signal of each phase by-passing the main control loop. All the phases will
then be turned-on together and the EA latencies results bypassed as well.
Sensitivity of the Load Transient Detector and the Gain of the LTB Ramp can be
programmed in order to control precisely both the undershoot and the ring-back.
Detector Design.
R
LTB
- C
LTB
is design according to the output voltage deviation dV
OUT
which is desired the controller to be sensitive as follow:
Ref
FB
COMP
VSEN
L
F
R
F
C
F
R
F
DROOP
PWM
L/N
ESR
C
O
R
O
d V
COMP
V
OUT
Z
F
(s)
Z
FB
(s)
VID
V
C
C
H
C
F
I
D
Monitor
R
LTB
C
LTB
PWM_BOOST
LTB Ramp
LTB
LT Detect
LT Detect
R
LTB
dV
25
μ
A
-----------------
=
C
LTB
2
π
N R
LTB
F
SW
-------------------------------------------------
=
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