- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄1931 > KSZ8851-32MQLI (Micrel Inc)IC CTLR MAC/PHY NON PCI 128PQFP PDF資料下載
參數(shù)資料
| 型號： | KSZ8851-32MQLI |
| 廠商： | Micrel Inc |
| 文件頁數(shù)： | 48/88頁 |
| 文件大小： | 0K |
| 描述： | IC CTLR MAC/PHY NON PCI 128PQFP |
| 標(biāo)準(zhǔn)包裝： | 66 |
| 控制器類型： | 以太網(wǎng)控制器，MAC/PHY |
| 接口： | 總線 |
| 電源電壓： | 1.8V，2.5V，3.3V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 128-BFQFP |
| 供應(yīng)商設(shè)備封裝： | 128-PQFP（14x20） |
| 包裝： | 托盤 |
| 其它名稱： | 576-3630 KSZ8851-32MQLI-ND |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁當(dāng)前第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁
PIC16F8X
1998 Microchip Technology Inc.
DS30430C-page 53
8.12.3
WAKE-UP USING INTERRUPTS
When global interrupts are disabled (GIE cleared) and
any interrupt source has both its interrupt enable bit
and interrupt flag bit set, one of the following will occur:
If the interrupt occurs before the execution of a
SLEEP
instruction, the SLEEP instruction will com-
plete as a NOP. Therefore, the WDT and WDT
postscaler will not be cleared, the TO bit will not
be set and PD bits will not be cleared.
If the interrupt occurs during or after the execu-
tion of a SLEEP instruction, the device will imme-
diately wake up from sleep. The SLEEP instruction
will be completely executed before the wake-up.
Therefore, the WDT and WDT postscaler will be
cleared, the TO bit will be set and the PD bit will
be cleared.
Even if the flag bits were checked before executing a
SLEEP
instruction, it may be possible for flag bits to
become set before the SLEEP instruction completes. To
determine whether a SLEEP instruction executed, test
the PD bit. If the PD bit is set, the SLEEP instruction
was executed as a NOP.
To ensure that the WDT is cleared, a CLRWDT instruc-
tion should be executed before a SLEEP instruction.
8.13
Program Verification/Code Protection
If
the
code
protection
bit(s)
have
not
been
programmed, the on-chip program memory can be
read out for verification purposes.
8.14
ID Locations
Four memory locations (2000h - 2003h) are designated
as ID locations to store checksum or other code
identification
numbers.
These
locations
are
not
accessible during normal execution but are readable
and writable only during program/verify. Only the
4 least significant bits of ID location are usable.
For ROM devices, these values are submitted along
with the ROM code.
8.15
In-Circuit Serial Programming
PIC16F8X
microcontrollers
can
be
serially
programmed while in the end application circuit. This is
simply done with two lines for clock and data, and three
other lines for power, ground, and the programming
voltage. Customers can manufacture boards with
unprogrammed
devices,
and
then
program
the
microcontroller just before shipping the product,
allowing the most recent firmware or custom firmware
to be programmed.
The device is placed into a program/verify mode by
holding the RB6 and RB7 pins low, while raising the
MCLR pin from VIL to VIHH (see programming
specification). RB6 becomes the programming clock
and RB7 becomes the programming data. Both RB6
and RB7 are Schmitt Trigger inputs in this mode.
After reset, to place the device into programming/verify
mode, the program counter (PC) points to location 00h.
A 6-bit command is then supplied to the device, 14-bits
of program data is then supplied to or from the device,
using load or read-type instructions. For complete
details of serial programming, please refer to the
PIC16CXX Programming Specifications (Literature
#DS30189).
FIGURE 8-20: TYPICAL IN-SYSTEM SERIAL
PROGRAMMING
CONNECTION
For ROM devices, both the program memory and Data
EEPROM memory may be read, but only the Data
EEPROM memory may be programmed.
Note:
Microchip does not recommend code pro-
tecting widowed devices.
External
Connector
Signals
To Normal
Connections
To Normal
Connections
PIC16FXX
VDD
VSS
MCLR/VPP
RB6
RB7
+5V
0V
VPP
CLK
Data I/O
VDD
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| KSZ8851-32MQL | IC CTLR MAC/PHY NON PCI 128PQFP |
| KSZ8851SNLI TR | IC ETHERNET CTLR 1PORT PCI 32MLF |
| KSZ8862-16MQL | IC SWITCH 10/100 16BIT 128-PQFP |
| KSZ8862-32MQL | IC ETHERNET SW 2PORT BUS 128PQFP |
| KSZ8863MLLI | IC ETHERNET SWITCH 3PORT 48-LQFP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KSZ8851MLL | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:Single Port MAC/PHY Controller with Non PCI Interface |
| KSZ8851MQL | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:Single Port MAC/PHY Controller with Non PCI Interface |
| KSZ8851SNL | 功能描述:IC CTLR MAC/PHY NON-PCI 32-QFN RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A |
| KSZ8851SNL TR | 功能描述:以太網(wǎng) IC Single Ethernet Port + SPI Bus Interface (Lead Free) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| KSZ8851SNL-BBE-EVAL | 功能描述:BOARD EVAL MAC/PHY FOR KSZ8851 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:LinkMD® 產(chǎn)品培訓(xùn)模塊:Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 主要目的:電源管理，電池充電器 嵌入式:否 已用 IC / 零件:MAX8903A 主要屬性:1 芯鋰離子電池 次要屬性:狀態(tài) LED 已供物品:板 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。