- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄1931 > KSZ8851-32MQLI (Micrel Inc)IC CTLR MAC/PHY NON PCI 128PQFP PDF資料下載
參數(shù)資料
| 型號： | KSZ8851-32MQLI |
| 廠商： | Micrel Inc |
| 文件頁數(shù)： | 34/88頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CTLR MAC/PHY NON PCI 128PQFP |
| 標(biāo)準(zhǔn)包裝： | 66 |
| 控制器類型： | 以太網(wǎng)控制器，MAC/PHY |
| 接口： | 總線 |
| 電源電壓： | 1.8V，2.5V，3.3V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 128-BFQFP |
| 供應(yīng)商設(shè)備封裝： | 128-PQFP（14x20） |
| 包裝： | 托盤 |
| 其它名稱： | 576-3630 KSZ8851-32MQLI-ND |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁當(dāng)前第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁
PIC18F45J10 FAMILY
DS39682E-page 38
2009 Microchip Technology Inc.
4.3
Sleep Mode
The power-managed Sleep mode is identical to the
legacy Sleep mode offered in all other PIC micro-
controllers. It is entered by clearing the IDLEN bit (the
default state on device Reset) and executing the
SLEEP
instruction. This shuts down the selected
oscillator (Figure 4-4). All clock source status bits are
cleared.
Entering the Sleep mode from any other mode does not
require a clock switch. This is because no clocks are
needed once the controller has entered Sleep. If the
WDT is selected, the INTRC source will continue to
operate. If the Timer1 oscillator is enabled, it will also
continue to run.
When a wake event occurs in Sleep mode (by interrupt,
Reset or WDT time-out), the device will not be clocked
until the clock source selected by the SCS<1:0> bits
becomes ready (see Figure 4-5), or it will be clocked
from the internal oscillator if either the Two-Speed
Start-up or the Fail-Safe Clock Monitor are enabled
either case, the OSTS bit is set when the primary clock
is providing the device clocks. The IDLEN and SCS bits
are not affected by the wake-up.
4.4
Idle Modes
The Idle modes allow the controller’s CPU to be
selectively shut down while the peripherals continue to
operate. Selecting a particular Idle mode allows users
to further manage power consumption.
If the IDLEN bit is set to a ‘1’ when a SLEEP instruction is
executed, the peripherals will be clocked from the clock
source selected using the SCS<1:0> bits; however, the
CPU will not be clocked. The clock source status bits are
not affected. Setting IDLEN and executing a SLEEP
instruction provides a quick method of switching from a
given Run mode to its corresponding Idle mode.
If the WDT is selected, the INTRC source will continue
to operate. If the Timer1 oscillator is enabled, it will also
continue to run.
Since the CPU is not executing instructions, the only
exits from any of the Idle modes are by interrupt, WDT
time-out or a Reset. When a wake event occurs, CPU
execution is delayed by an interval of TCSD
(parameter 38, Table 24-10) while it becomes ready to
execute code. When the CPU begins executing code,
it resumes with the same clock source for the current
Idle mode. For example, when waking from RC_IDLE
mode, the internal oscillator block will clock the CPU
and peripherals (in other words, RC_RUN mode). The
IDLEN and SCS bits are not affected by the wake-up.
While in any Idle mode or the Sleep mode, a WDT
time-out will result in a WDT wake-up to the Run mode
currently specified by the SCS<1:0> bits.
FIGURE 4-4:
TRANSITION TIMING FOR ENTRY TO SLEEP MODE
FIGURE 4-5:
TRANSITION TIMING FOR WAKE FROM SLEEP
Q4
Q3
Q2
OSC1
Peripheral
Sleep
Program
Q1
Counter
Clock
CPU
Clock
PC + 2
PC
Q3 Q4 Q1 Q2
OSC1
Peripheral
Program
PC
Q3 Q4
CPU Clock
Q1
Q2 Q3 Q4 Q1 Q2
Clock
Counter
PC + 6
PC + 4
Q1 Q2 Q3 Q4
Wake Event
Note 1:
TOST = 1024 TOSC. These intervals are not shown to scale.
TOST(1)
OSTS bit Set
PC + 2
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| KSZ8851-32MQL | IC CTLR MAC/PHY NON PCI 128PQFP |
| KSZ8851SNLI TR | IC ETHERNET CTLR 1PORT PCI 32MLF |
| KSZ8862-16MQL | IC SWITCH 10/100 16BIT 128-PQFP |
| KSZ8862-32MQL | IC ETHERNET SW 2PORT BUS 128PQFP |
| KSZ8863MLLI | IC ETHERNET SWITCH 3PORT 48-LQFP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KSZ8851MLL | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:Single Port MAC/PHY Controller with Non PCI Interface |
| KSZ8851MQL | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:Single Port MAC/PHY Controller with Non PCI Interface |
| KSZ8851SNL | 功能描述:IC CTLR MAC/PHY NON-PCI 32-QFN RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A |
| KSZ8851SNL TR | 功能描述:以太網(wǎng) IC Single Ethernet Port + SPI Bus Interface (Lead Free) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| KSZ8851SNL-BBE-EVAL | 功能描述:BOARD EVAL MAC/PHY FOR KSZ8851 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:LinkMD® 產(chǎn)品培訓(xùn)模塊:Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 主要目的:電源管理，電池充電器 嵌入式:否 已用 IC / 零件:MAX8903A 主要屬性:1 芯鋰離子電池 次要屬性:狀態(tài) LED 已供物品:板 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。