- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄1931 > KSZ8851-32MQLI (Micrel Inc)IC CTLR MAC/PHY NON PCI 128PQFP PDF資料下載
參數(shù)資料
| 型號(hào)： | KSZ8851-32MQLI |
| 廠商： | Micrel Inc |
| 文件頁數(shù)： | 15/88頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CTLR MAC/PHY NON PCI 128PQFP |
| 標(biāo)準(zhǔn)包裝： | 66 |
| 控制器類型： | 以太網(wǎng)控制器，MAC/PHY |
| 接口： | 總線 |
| 電源電壓： | 1.8V，2.5V，3.3V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 128-BFQFP |
| 供應(yīng)商設(shè)備封裝： | 128-PQFP（14x20） |
| 包裝： | 托盤 |
| 其它名稱： | 576-3630 KSZ8851-32MQLI-ND |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁當(dāng)前第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁
Micrel, Inc.
KSZ8851-16/32 MQL/MQLI
August 2009
22
M9999-083109-2.0
Functional Description
The KSZ8851M is a single-chip Fast Ethernet MAC/PHY controller consisting of a 10/100 physical layer transceiver
(PHY), a MAC, and a Bus Interface Unit (BIU) that controls the KSZ8851M via an 8-bit, 16-bit or 32-bit host bus interface.
The KSZ8851M is fully compliant to IEEE802.3u standards.
Functional Overview
Power Management
The KSZ8851M supports enhanced power management feature in low power state with energy detection to ensure low-
power dissipation during device idle periods. There are four operation modes under the power management function
which is controlled by two bits in PMECR (0xD4) register as shown below:
PMECR[1:0] = 00 Normal Operation Mode
PMECR[1:0] = 01 Energy Detect Mode
PMECR[1:0] = 10 Soft Power Down Mode
PMECR[1:0] = 11 Power Saving Mode
Table 1 indicates all internal function blocks status under four different power management operation modes.
Power Management Operation Modes
KSZ8851M
Function Blocks
Normal mode
Power saving mode
Energy detect mode
Soft power down mode
Internal PLL Clock
Enabled
Disabled
Tx/Rx PHY
Enabled
Rx unused block disabled
Energy detect at Rx
Disabled
MAC
Enabled
Disabled
Host Interface
Enabled
Disabled
Table 1. Internal Function Blocks Status
Normal Operation Mode
This is the default setting bit[1:0]=00 in PMECR register after the chip power-up or hardware reset (pin 67). When
KSZ8851M is in this normal operation mode, all PLL clocks are running, PHY and MAC are on and the host interface is
ready for CPU read or write.
During the normal operation mode, the host CPU can set the bit[1:0] in PMECR register to transit the current normal
operation mode to any one of the other three power management operation modes.
Energy Detect Mode
The energy detect mode provides a mechanism to save more power than in the normal operation mode when the
KSZ8851M is not connected to an active link partner. For example, if cable is not present or it is connected to a powered
down partner, the KSZ8851M can automatically enter to the low power state in energy detect mode. Once activity
resumes due to plugging a cable or attempting by the far end to establish link, the KSZ8851M can automatically power up
to normal power state in energy detect mode.
Energy detect mode consists of two states, normal power state and low power state. While in low power state, the
KSZ8851M reduces power consumption by disabling all circuitry except the energy detect circuitry of the receiver. The
energy detect mode is entered by setting bit[1:0]=01 in PMECR register. When the KSZ8851M is in this mode, it will
monitor the cable energy. If there is no energy on the cable for a time longer than pre-configured value at bit[7:0] Go-
Sleep time in GSWUTR register, KSZ8851M will go into a low power state. When KSZ8851M is in low power state, it will
keep monitoring the cable energy. Once the energy is detected from the cable and is continuously presented for a time
longer than pre-configured value at bit[15:8] Wake-Up time in GSWUTR register, the KSZ8851M will enter either the
normal power state if the auto-wakeup enable bit[7] is set in PMECR register or the normal operation mode if both auto-
wakeup enable bit[7] and wakeup to normal operation mode bit[6] are set in PMECR register.
The KSZ8851M will also assert PME output pin if the corresponding enable bit[8] is set in PMECR (0xD4) register or
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| KSZ8851-32MQL | IC CTLR MAC/PHY NON PCI 128PQFP |
| KSZ8851SNLI TR | IC ETHERNET CTLR 1PORT PCI 32MLF |
| KSZ8862-16MQL | IC SWITCH 10/100 16BIT 128-PQFP |
| KSZ8862-32MQL | IC ETHERNET SW 2PORT BUS 128PQFP |
| KSZ8863MLLI | IC ETHERNET SWITCH 3PORT 48-LQFP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| KSZ8851MLL | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:Single Port MAC/PHY Controller with Non PCI Interface |
| KSZ8851MQL | 制造商:MICREL 制造商全稱:Micrel Semiconductor 功能描述:Single Port MAC/PHY Controller with Non PCI Interface |
| KSZ8851SNL | 功能描述:IC CTLR MAC/PHY NON-PCI 32-QFN RoHS:是 類別:集成電路 (IC) >> 接口 - 控制器 系列:- 標(biāo)準(zhǔn)包裝:4,900 系列:- 控制器類型:USB 2.0 控制器 接口:串行 電源電壓:3 V ~ 3.6 V 電流 - 電源:135mA 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:36-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:36-QFN（6x6） 包裝:* 其它名稱:Q6396337A |
| KSZ8851SNL TR | 功能描述:以太網(wǎng) IC Single Ethernet Port + SPI Bus Interface (Lead Free) RoHS:否 制造商:Micrel 產(chǎn)品:Ethernet Switches 收發(fā)器數(shù)量:2 數(shù)據(jù)速率:10 Mb/s, 100 Mb/s 電源電壓-最大:1.25 V, 3.45 V 電源電壓-最小:1.15 V, 3.15 V 最大工作溫度:+ 85 C 封裝 / 箱體:QFN-64 封裝:Tray |
| KSZ8851SNL-BBE-EVAL | 功能描述:BOARD EVAL MAC/PHY FOR KSZ8851 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評(píng)估演示板和套件 系列:LinkMD® 產(chǎn)品培訓(xùn)模塊:Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:1 系列:- 主要目的:電源管理，電池充電器 嵌入式:否 已用 IC / 零件:MAX8903A 主要屬性:1 芯鋰離子電池 次要屬性:狀態(tài) LED 已供物品:板 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。