參數(shù)資料
型號(hào)： KSZ8851-32MQLI
廠商： Micrel Inc
文件頁(yè)數(shù)： 23/88頁(yè)
文件大小： 0K
描述： IC CTLR MAC/PHY NON PCI 128PQFP
標(biāo)準(zhǔn)包裝： 66
控制器類型： 以太網(wǎng)控制器，MAC/PHY
接口： 總線
電源電壓： 1.8V，2.5V，3.3V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 128-BFQFP
供應(yīng)商設(shè)備封裝： 128-PQFP（14x20）
包裝： 托盤
其它名稱： 576-3630
KSZ8851-32MQLI-ND
PIC18F45J10 FAMILY
DS39682E-page 28
2009 Microchip Technology Inc.
TABLE 3-2:
CAPACITOR SELECTION FOR
CRYSTAL OSCILLATOR
3.3
External Clock Input (EC Modes)
The EC and ECPLL Oscillator modes require an exter-
nal clock source to be connected to the OSC1 pin.
There is no oscillator start-up time required after a
Power-on Reset or after an exit from Sleep mode.
In the EC Oscillator mode, the oscillator frequency
divided by 4 is available on the OSC2 pin. This signal
may be used for test purposes or to synchronize other
logic. Figure 3-2 shows the pin connections for the EC
Oscillator mode.
FIGURE 3-2:
EXTERNAL CLOCK
INPUT OPERATION
(EC CONFIGURATION)
An external clock source may also be connected to the
OSC1 pin in the HS mode, as shown in Figure 3-3. In
this configuration, the divide-by-4 output on OSC2 is
not available.
FIGURE 3-3:
EXTERNAL CLOCK INPUT
OPERATION (HS OSC
CONFIGURATION)
Osc Type
Crystal
Freq.
Typical Capacitor Values
Tested:
C1
C2
HS
4 MHz
27 pF
8 MHz
22 pF
20 MHz
15 pF
Capacitor values are for design guidance only.
These capacitors were tested with the crystals listed
below for basic start-up and operation. These values
are not optimized.
Different capacitor values may be required to produce
acceptable oscillator operation. The user should test
the performance of the oscillator over the expected
VDD and temperature range for the application.
See the notes following this table for additional
information.
Crystals Used:
4 MHz
8 MHz
20 MHz
Note 1:
Higher capacitance increases the stability
of oscillator but also increases the
start-up time.
2:
Since each resonator/crystal has its own
characteristics, the user should consult
the resonator/crystal manufacturer for
appropriate
values
of
external
components.
3:
Rs may be required to avoid overdriving
crystals with low drive level specification.
4:
Always verify oscillator performance over
the VDD and temperature range that is
expected for the application.
OSC1/CLKI
OSC2/CLKO
FOSC/4
Clock from
Ext. System
PIC18F45J10
OSC1
OSC2
Open
Clock from
Ext. System
PIC18F45J10
(HS Mode)
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