參數(shù)資料
型號: KBE00G003M-D411
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: NAND 512Mb*2 + Mobile SDRAM 256Mb*2
中文描述: NAND閃存的512Mb * 2移動SDRAM 256Mb的* 2
文件頁數(shù): 9/89頁
文件大小: 1238K
代理商: KBE00G003M-D411
KBE00G003M-D411
MCP MEMORY
July 2005
9
Revision 0.1
512B Bytes
16 Bytes
Figure 1. Functional Block Diagram
Figure 2. Array Organization
NOTE
: Column Address : Starting Address of the Register.
00h Command(Read) : Defines the starting address of the 1st half of the register.
01h Command(Read) : Defines the starting address of the 2nd half of the register.
* A
8
is set to "Low" or "High" by the 00h or 01h Command.
* L must be set to "Low".
I/O 0
I/O 1
I/O 2
I/O 3
I/O 4
I/O 5
I/O 6
I/O 7
1st Cycle
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
2nd Cycle
A
9
A
10
A
11
A
12
A
13
A
14
A
15
A
16
3rd Cycle
A
17
A
18
A
19
A
20
A
21
A
22
A
23
A
24
4th Cycle
A
25
A
26
*L
*L
*L
*L
*L
*L
V
CC
V
SS
X-Buffers
Latches
& Decoders
Command
Register
I/O Buffers & Latches
Y-Buffers
Latches
& Decoders
Control Logic
& High Voltage
Generator
Global Buffers
Output
Driver
A
9
- A
26
A
0
- A
7
Command
CE
RE
WE
CLE
WP
I/0 0
I/0 7
V
CC
V
SS
A
8
1st half Page Register
(=256 Bytes)
2nd half Page Register
(=256 Bytes)
256K Pages
(=8,192 Blocks)
512 Bytes
8 bit
16 Bytes
1 Block = 32 Pages
(16K + 512) Byte
I/O 0 ~ I/O 7
1 Page = 528 Bytes
1 Block = 528 B x 32 Pages
= (16K + 512) Bytes
1 Device = 528B x 32Pages x 8,192 Blocks
= 1,056 Mbits
Column Address
Row Address
(Page Address)
Page Register
ALE
1,024M + 32M Bit
NAND Flash
ARRAY
(512 + 16)Byte x 262,144
Y-Gating
Page Register & S/A
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