參數(shù)資料
型號(hào)： KAB04D100M-TNGP
廠商： SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述： Multi-Chip Package MEMORY
中文描述： 多芯片封裝存儲(chǔ)器
文件頁(yè)數(shù)： 2/72頁(yè)
文件大?。?/td> 1378K
代理商： KAB04D100M-TNGP
KAB0xD100M - TxGP
Multi-Chip Package MEMORY
64M Bit (8Mx8/4Mx16) Dual Bank NOR Flash / 128M Bit (8Mx16) NAND Flash / 32M Bit
(2Mx16) UtRAM
FEATURES
Power Supply Voltage : 2.7V~3.1V
Organization
- NOR Flash : 8,388,608 x 8 bit / 4,194,304 x 16 bit
- NAND Flash : (8M + 256K)bit x 16bit
- U
t
RAM : 2Mbit x 16 bit
Access Time
- NOR Flash : 70ns(Max.)
- NAND Flash : Random : 10us(Max.), Serial : 50ns(Min.)
- U
t
RAM : 85ns
Power Consumption (typical value)
- NOR Flash Read Current : 14mA (@5MHz)
Program/Erase Current : 15mA
Read while Program or Read while Erase : 35mA
Standby Mode/Autosleep Mode :
10
μ
A
- NAND Flash Read Current : 10mA(@20MHz)
Program/Erase Current : 10mA
Standby Current : 10
μ
A
- U
t
RAM Operating Current : 30mA
Standby Current : 80
μ
A
NOR Flash Secode(Security Code) Block : Extra 64KB Block
NOR Flash Block Group Protection / Unprotection
NOR Flash Bank Size : 16Mb / 48Mb , 32Mb / 32Mb
NAND Flash Automatic Program and Erase
Page Program: (256 + 8)Word, Block Erase: (8K + 256)Word
NAND Flash Fast Write Cycle Time
Program time : 200
μ
s(Typ.)
Block Erase Time : 2ms(Typ.)
Endurance
NOR : 100,000 Program/Erase Cycles Minimum
NAND : 100,000 Program/Erase Cycles Minimum with ECC
: 1,000 Program/Erase Cycles Maximum without ECC
Data Retention : 10 years
Operating Temperature : -25
°
C ~ 85
°
C
Package : 80 - Ball TBGA Type - 8 x 12mm, 0.8 mm pitch
BALL CONFIGURATION
1
2
3
4
5
6
7
8
Revision 1.11
August 2003
- 2 -
MCP MEMORY
SEC Only
The KAB0xD100M
featuring single 3.0V power supply is a Multi
Chip Package Memory which combines 64Mbit NOR Flash,
128Mbit NAND Flash and 32Mbit Unit Transistor CMOS RAM.
64Mbit NOR Flash memory is organized as 8M x8 or 4M x16 bit,
128Mbit NAND Flash memory is organized as 8M x16 bit and
32Mbit U
t
RAM is organized as 2M x16 bit. The memory architec-
ture of NOR Flash memory is designed to divide its memory arrays
into 135 blocks and this provides highly flexible erase and program
capability. This device is capable of reading data from one bank
while programming or erasing in the other bank with dual bank
organization. NOR Flash memory performs a program operation in
units of 8 bits (Byte) or 16 bits (Word) and erases in units of a
block. Single or multiple blocks can be erased. The block erase
operation is completed for typically 0.7sec.
In 128Mbit NAND Flash a 256-word page program can be typically
achieved within 200
μ
s and an 8K-word block erase can be typi-
cally achieved within 2ms. In serial read operation, a byte can be
read by 50ns. DQ pins serve as the ports for address and data
input/output as well as command inputs. The KAB0xD100M is
suitable for the memory of mobile communication system to
reduce not only mount area but also power consumption. This
device is available in 80-ball TBGA package.
GENERAL DESCRIPTION
SAMSUNG ELECTRONICS CO., LTD.
reserves the right to change products and specifications without notice.
Ball Name
A0 to A20
A-1, A21
DQ0 to DQ7
DQ8 to DQ15
Vcc
R
Vcc
F
Vcc
U
VccQ
U
Vss
WE
OE
CE
R
CE
F
CS
U
RESET
Description
Address Input Balls (NOR, U
t
RAM)
Address Input Balls (NOR)
Data Input/Output Balls (Common)
Data Input/Output Balls (Common)
Power Supply (NOR)
Power Supply (NAND)
Power Supply (U
t
RAM)
Data Output Buffer Power (U
t
RAM)
Ground (Common)
Write Enable (Common)
Output Enable (NOR,U
t
RAM)
Chip Enable (NOR)
Chip Enable (NAND)
Chip Enable (U
t
RAM)
Hardware Reset (NOR)
Hardware Write Protection/Program
Acceleration (NOR)
WP/ACC
BYTE
R/B
R
WP
CLE
ALE
R/B
F
RE
ZZ
UB
LB
N.C
DNU
Byte Control (NOR)
Read/Busy (NOR)
Write Protection (NAND)
Command Latch Enable(NAND)
Address Latch Enable(NAND)
Read/Busy (NAND)
Output Enable (NAND)
Deep Power Down (U
t
RAM)
Upper Byte Enable (U
t
RAM)
Lower Byte Enable (U
t
RAM)
No Connection
Do Not Use
BALL DESCRIPTION
CLE
N.C
R/B
F
A18
ALE
Vcc
U
N.C
WE
A9
A17
WP/
ACC
N.C
Vss
A20
A10
A7
A
B
C
D
E
F
Vcc
F
RESET
A11
RE
LB
A12
A13
A14
A15
H
G
A3
DNU
DNU
A6
K
J
80 Ball TBGA , 0.8mm Pitch
Top View (Ball Down)
L
N
M
DNU
DNU
R/B
R
A5
A4
UB
A19
WP
N.C
A8
CS
U
CE
R
N.C
CE
F
N.C
BYTE
DQ2
DQ11
VccQ
U
Vss
DQ12
DQ5
DQ3
ZZ
A21
DQ13
DQ9
N.C
N.C
A16
DQ14
DQ7
DQ8
A1
A2
A0
OE
Vcc
U
N.C
DQ10
DQ6
DQ1
Vcc
R
/A-1
DQ0
Vcc
F
DQ4
DNU
DNU
DNU
DNU
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