
DDR SDRAM
DDR SDRAM stacked 512Mb E-die (x4/x8)
Rev. 1.0 July. 2003
st. 32M x 4Bit x 4 Banks / st. 16M x 8Bit x 4 Banks Double Data Rate SDRAM
The K4H510638E / K4H510738E is 536,870,912 bits of double data rate synchronous DRAM organized as 4x 33,553,332 / 4x
16,777,216 words by 4/ 8bits, fabricated with SAMSUNG
′
s high performance CMOS technology. Synchronous features with Data Strobe
allow extremely high performance up to 266Mb/s per pin. I/O transactions are possible on both edges of DQS. Range of operating fre-
quencies, programmable burst length and programmable latencies allow the device to be useful for a variety of high performance mem-
ory system applications.
General Description
Absolute Maximum Rating
Parameter
Symbol
V
IN
, V
OUT
V
DD
, V
DDQ
T
STG
P
D
I
OS
Value
-0.5 ~ 3.6
Unit
V
Voltage on any pin relative to V
SS
Voltage on V
DD
 & V
DDQ 
supply relative to V
SS
Storage temperature
-1.0 ~ 3.6
V
-55 ~ +150
°
C
Power dissipation
1.5
W
Short circuit current
50
mA
Note : 
Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded.
Functional operation should be restricted to recommend operation condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability.
DC Operating Conditions                    
Recommended operating conditions(Voltage referenced to V
SS
=0V, T
A
=0 to 70
°
C)
Parameter
Symbol
V
DD
Min
2.3
Max
Unit
Note
Supply voltage(for device with a nominal V
DD
 of 2.5V)
2.7
I/O Supply voltage
I/O Reference voltage
I/O Termination voltage(system)
V
DDQ
V
REF
V
TT
V
IH
(DC)
V
IL
(DC)
V
IN
(DC)
V
ID
(DC)
VI(Ratio)
I
I
I
OZ
2.3
2.7
V
V
0.49*VDDQ
V
REF
-0.04
0.51*VDDQ
V
REF
+0.04
1
V
2
Input logic high voltage
Input logic low voltage
Input Voltage Level, CK and CK inputs
Input Differential Voltage, CK and CK inputs
V-I Matching: Pullup to Pulldown Current Ratio
Input leakage current
Output leakage current
Output High Current(Normal  strengh driver) ;V
OUT
 = V
TT
 + 0.84V
Output High Current(Normal  strengh driver)  ;V
OUT
 = V
TT
 - 0.84V
Output High Current(Half  strengh driver) ;V
OUT
 = V
TT
 + 0.45V
Output High Current(Half  strengh driver)  ;V
OUT
 = V
TT
 - 0.45V
V
REF
+0.15
-0.3
-0.3
0.36
0.71
-2
-5
V
DDQ
+0.3
V
REF
-0.15
V
DDQ
+0.3
V
DDQ
+0.6
1.4
2
5
V
V
V
V
-
uA
uA
3
4
I
OH
-16.8
mA
I
OL
16.8
mA
I
OH
-9
mA
I
OL
9
mA
1.VREF is expected to be equal to 0.5*VDDQ of the transmitting device, and to track variations in the dc level of same.
    Peak-to peak noise on VREF may not exceed +/-2% of the dc value.
2. V
TT
 is not applied directly to the device. V
TT
 is a system supply for signal termination resistors, is expected to be set equal to  
    V
REF
, and must track variations in the DC level of V
REF
3. V
ID
 is the magnitude of the difference between the input level on CK and the input level on CK.
4. The ratio of the pullup current to the pulldown current is specified for the same temperature and voltage, over the entire
     temperature and voltage range, for device drain to source voltages from 0.25V to 1.0V. For a given output, it represents the 
     maximum difference between pullup and pulldown drivers due to process variation. The full variation in the ratio of the 
     maximum to minimum pullup and pulldown current will not exceed 1/7 for device drain to source voltages from 0.1 to 1.0.
Note :