參數(shù)資料
型號(hào)： ISL12025
廠商： Intersil Corporation
英文描述： Real-Time Clock/Calendar with EEPROM(EEPROM實(shí)時(shí)時(shí)鐘/日歷)
中文描述： 實(shí)時(shí)時(shí)鐘/日歷（EEPROM的實(shí)時(shí)時(shí)鐘/日歷帶有EEPROM）
文件頁數(shù)： 15/27頁
文件大?。?/td> 412K
代理商： ISL12025
15
FN6371.2
October 19, 2007
Standard Mode Power Switchover
Normal Operating Mode (V
DD
) to Battery Backup Mode
(V
BAT
)
To transition from the V
DD
to V
BAT
mode, both of the
following conditions must be met:
- Condition 1:
V
DD
< V
BAT
- V
BATHYS
where V
BATHYS
≈
50mV
- Condition 2:
V
DD
< V
TRIP
where V
TRIP
≈
2.2V
Battery Backup Mode (V
BAT
) to Normal Mode (V
DD
)
The ISL12025 device will switch from the V
BAT
to V
DD
mode when one of the following conditions occurs:
- Condition 1:
V
DD
> V
BAT
+ V
BATHYS
where V
BATHYS
≈
50mV
- Condition 2
:
V
DD
> V
TRIP
+ V
TRIPHYS
where V
TRIPHYS
≈
30mV
There are two discrete situations that are possible when
using Standard Mode: V
BAT
< V
TRIP
and V
BAT
> V
TRIP
.
These two power control situations are illustrated in
Figures 13 and 14.
OPTION 2 - LEGACY (POWER CONTROL) MODE
(DEFAULT)
The Legacy Mode follows conditions set in X1226 products.
In this mode, switching from V
DD
to V
BAT
is simply done by
comparing the voltages and the device operates from
whichever is the higher voltage. Care should be taken when
changing from Normal to Legacy Mode. If the V
BAT
voltage is
higher than V
DD
, then the device will enter battery back up
and unless the battery is disconnected or the voltage
decreases, the device will no longer operate from V
DD
.
To select the Option 2, BSW bit in the Power Register must
be set to “BSW = 1”.
Normal Mode (V
DD
) to Battery Backup Mode (V
BAT
)
To transition from the V
DD
to V
BAT
mode, the following
conditions must be met:
V
DD
< V
BAT
- V
BATHYS
Battery Backup Mode (V
BAT
) to Normal Mode (V
DD
)
The device will switch from the V
BAT
to V
DD
mode when
the following condition occurs:
V
DD
> V
BAT
+V
BATHYS
The Legacy Mode power control conditions are illustrated in
Figure 15.
Power-On Reset
Application of power to the ISL12025 activates a
Power-On-Reset Circuit that pulls the RESET pin active.
This signal provides several benefits.
- It prevents the system microprocessor from starting to
operate with insufficient voltage.
- It prevents the processor from operating prior to
stabilization of the oscillator.
- It allows time for an FPGA to download its configuration
prior to initialization of the circuit.
- It prevents communication to the EEPROM, greatly
reducing the likelihood of data corruption on power-up.
When V
DD
exceeds the device V
RESET
threshold value for
typically 250ms the circuit releases RESET, allowing the
system to begin operation. Recommended slew rate is
between 0.2V/ms and 50V/ms.
Watchdog Timer Operation
The watchdog timer timeout period is selectable. By writing a
value to WD1 and WD0, the watchdog timer can be set to 3
different time out periods or off. When the Watchdog timer is
set to off, the watchdog circuit is configured for low power
operation. See Table 6.
BATTERY BACKUP
MODE
V
DD
2.2V
FIGURE 13. BATTERY SWITCHOVER WHEN V
BAT
< V
TRIP
V
BAT
V
TRIP
1.8V
V
BAT
+ V
BATHYS
V
BAT
- V
BATHYS
FIGURE 14. BATTERY SWITCHOVER WHEN V
BAT
> V
TRIP
V
TRIP
V
BAT
V
TRIP
+ V
TRIPHYS
BATTERY BACKUP
MODE
V
DD
V
TRIP
3.0V
2.2V
V
BAT
IN
VOLTAGE
V
DD
ON
OFF
FIGURE 15. BATTERY SWITCHOVER IN LEGACY MODE
ISL12025
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ISL12025IVZ 功能描述:實(shí)時(shí)時(shí)鐘 REAL TIME CLK/CLNDR W/EEPROM 2 63SET 8 RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時(shí)間格式:HH:MM:SS RTC 存儲(chǔ)容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube
ISL12025IVZ-T 功能描述:實(shí)時(shí)時(shí)鐘 REAL TIME CLK/CLNDR W/EEPROM 2 63SET 8 RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時(shí)間格式:HH:MM:SS RTC 存儲(chǔ)容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube
ISL12026 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Real Time Clock/Calendar with I2C Bus? and EEPROM
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