參數(shù)資料
型號(hào): HV7121B
廠商: HYNIX SEMICONDUCTOR INC
元件分類: 模擬信號(hào)調(diào)理
英文描述: CMOS IMAGE SENSOR With 8-bit ADC
中文描述: SPECIALTY ANALOG CIRCUIT, CQCC48
封裝: CERAMIC, LCC-48
文件頁數(shù): 17/30頁
文件大?。?/td> 446K
代理商: HV7121B
HV7121B
Electronics Industries Co., Ltd.
System IC Division
CMOS IMAGE SENSOR
With 8-bit ADC
This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any
responsibility for use of circuits described. NO patent licenses are implied.
DA41990615R_1.0 17 1999 Hyundai System IC
Division
<Default window area>
FRSU, FRSL 6 FWHU, FWHL 402
FCSU, FCSL 6 FWWU, FWWL 302
< Pixel Array Structure >
(8) HSYNC Blanking Time Register
Higher byte : Address 20h, default : 00h, R/W)
Lower byte : Address 21h, default : 03h, R/W)
The HSYNC blanking time defines HSYNC low duration between data valid HSYNC high, pixel unit . HSYNC
low duration is HSYNC blanking time plus twelve in pixel unit for example, default HSYNC low duration is 15
pixels because register value is 3.
t’s used to change duration between current line end and next line start.
+1 : dummy area
+1 : interpolation area
+3 : margin for metal 3 slope
+2 : optical block zone
+1 : dummy zone for set of color pattern
pixel array : 400 * 300
Total pixel : 416 * 316
B
G
G
B
R
G
- - - -
- - - -
R
G
R
G
G
B
Active window area (402 * 302)
Accessible address range(414 * 314)
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