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參數(shù)資料
| 型號： | HT9580 |
| 廠商： | Holtek Semiconductor Inc. |
| 英文描述： | Character Pager Controller |
| 中文描述： | 字符傳呼機控制器 |
| 文件頁數(shù)： | 37/63頁 |
| 文件大?。?/td> | 444K |
| 代理商： | HT9580 |
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HT9580
37
April 28, 2000
Preliminary
Symbol
Bit
R/W
Description
STB
3
R
Standby indication bit
When the value of the ON bit is 1, the system goes into the
STANDBY state. The STANDBY state allows the
the configuration RAM setting.
C to execute
OR
5
R
Out-of-range indication bit
Whenever the decoder detects an out-of-range hold time, that is
selected by the configuration registers SPF06 and SPF07. The
out-of-range indication may be tested for an out-of-range condi-
tion whenever the interface enable of the decoder is active; other-
wiseORisnormallylow.Theout-of-rangeindicationissethighby
detection of valid data transmission.
If the out-of-range indication bit changes the status from high to
low or low to high, an interrupt will be generated and the
out-of-range hold-off time-out counter starts to count.
The bit is not valid when the SPI circuit is enabled.
BL
6
R/W
Battery low indication bit
The battery low indication is periodically tested for a battery low
condition. If the decoder encounters a battery low condition, the
battery low indication bit is cleared low. The C can only set the
BL bit high. Attempting to clear this bit has no effect.
The bit is not valid when the SPI circuit is enabled.
User address format
A user address in the POCSAG code consists
of 21 bits. Three of the 21 bits are coded in the
frame number and are therefore not explicitly
transmitted. In the decoder, the addresses A,
B, C, D, E and F can use six different frames
respectively. Every address has to be explic-
itly enabled by resetting the associated en-
able bit.
Example:
Address decimal value: RICA=10535
Binary equivalent (14-bit): 10100100100111
Binary equivalent (18+3-bit):
000000010100100100111
Register allocation
A00
A01
A02
A03
A04
A05
A06
0
0
0
0
0
0
0
A07
A08
A09
A10
A11
A12
A13
1
0
1
0
0
1
0
A14
A15
A16
A17
FA2
FA1
FA0
0
1
0
0
1
1
1
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