HT46R23/HT46C23
Rev. 1.60
25
May 3, 2004
Receive Acknowledge Bit
When the receiver wants to continue to receive the next data byte, it generates an acknowledge bit (TXAK) at the 9th
clock. The transmitter checks the acknowledge bit (RXAK) to continue to write data to the I
2
C Bus or change to receive
mode and dummy read the HDR register to release the SDA line and the master sends the STOP signal.
Options
The following table shows all kinds of options in the microcontroller. All of the options must be defined to ensure proper
system function.
No.
Options
1
OSC type selection.
This option is to decide if an RC or crystal oscillator is chosen as system clock.
2
WDT source selection.
There are three types of selection: on-chip RC oscillator, instruction clock or disable the WDT.
3
CLRWDT times selection.
This option defines how to clear the WDT by instruction. One time means that the CLR WDT instruction can
clear the WDT. Two times means only if both of the CLR WDT1 and CLR WDT2 instructions have been exe-
cuted, then WDT can be cleared.
4
Wake-up selection.
This option defines the wake-up function activity. External I/O pins (PA only) all have the capability to wake-up
the chip from a HALT.
5
Pull-high selection.
This option is to decide whether a pull-high resistance is visible or not in the input mode of the I/O ports.
PA0~PA7, can be independently selected.
6
PFD selection:
PA3: level output or PFD output
7
PWM selection: (7+1) or (6+2) mode
PD0: level output or PWM0 output
PD1: level output or PWM1 output
8
WDT time-out period selection.
There are four types of selection: WDT clock source divided by 2
12
, 2
13
, 2
14
and 2
15
9
Low voltage reset selection: Enable or disable LVR function.
10
I
2
C Bus selection:
PA6 and PA7: I/O or I
2
C Bus function