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參數(shù)資料
| 型號： | HDMP-1034 |
| 英文描述： | 1.4 GBd Receiver Chip Set with CIMT Encoder/Decoder and Variable Data Rate(帶CIMT編碼器/譯碼器和變量數(shù)據(jù)速率的1.4 GBd 接收器) |
| 中文描述： | 1.4 GBd接收芯片組與CIMT編碼器/解碼器和可變數(shù)據(jù)速率（帶CIMT編碼器/譯碼器和變量數(shù)據(jù)速率的1.4 GBd接收器） |
| 文件頁數(shù)： | 19/32頁 |
| 文件大小： | 346K |
| 代理商： | HDMP-1034 |
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19
HDMP-1034 (Rx) Pin Definition (continued)
CDR/Clock Generator
Name
Pin
RXCAP0
32
RXCAP1
33
Type
C
Signal
Loop Filter Capacitor:
A 0.1
μ
F min. loop filter capacitor, C2, must
be connected across RXCAP0 and RXCAP1 for all combinations
of RXDIV1/RXDIV0. See Figure 12.
Reference Clock Input:
The Rx PLL uses this input for frequency
lock. In addition, RX[0-15], RXFLAG, RXDATA, RXCNTL, RXREADY,
RXERROR, and RXDSLIP are clocked out on the rising edge of
REFCLK when PASSENB=1.
VCO Divider Select:
These pins program the VCO divider chain
to operate at full, half, or quarter speed. See Typical Operating
Rates table and Figure 2.
Recovered Word-Rate Clock Outputs:
These outputs are the PLL
recovered word rate clocks. RX[0-15], RXFLAG, RXDATA,
RXCNTL, RXREADY, RXERROR, and RXDSLIP are clocked out on
the falling edge of RXCLK1 when PASSENB=0. RXCLK0 is the
inverse of RXCLK1.
REFCLK
11
I-TTL
RXDIV0
RXDIV1
28
29
I-TTL
RXCLK0
RXCLK1
37
38
O-TTL
Power Supply/Ground
V
CC
9
24
40
7
42
49
57
64
16
S
Power Supply:
Normally 3.3 volts. This power supply is used for
all the core logic other than the output drivers.
V
CC
_TTL
S
TTL Power Supply:
Normally 3.3 volts. Used for all TTL receiver
input and output buffer cells.
V
CC
_HS
S
High-Speed Supply:
Normally 3.3 volts. This supply is used to
provide clean references for the high-speed inputs, HSIN+
and HSIN-.
Analog Power Supply:
Normally 3.3 volts. This supply is used to
feed power to the analog section of the chip.
Ground:
Normally 0 volts. Tie to ground.
V
CC
_A
30
S
GND
10
25
39
56
1
8
41
48
17
20
S
GND_TTL
S
TTL Ground:
Normally 0 volts. Tie to ground.
GND_HS
S
High-Speed Input Ground:
When tied to ground, the input
impedance of HSIN+ and HSIN- are each matched to 50
. In
order to obtain high impedance (high-Z) inputs for 1:N broadcast
applications, 18 K
series resistors to -5 V are recommended.
Analog Ground:
Normally 0 volts. This ground is used for the
analog PLL portion of the chip.
GND_A
31
S
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