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參數(shù)資料
| 型號： | HDMP-1034 |
| 英文描述： | 1.4 GBd Receiver Chip Set with CIMT Encoder/Decoder and Variable Data Rate(帶CIMT編碼器/譯碼器和變量數(shù)據(jù)速率的1.4 GBd 接收器) |
| 中文描述： | 1.4 GBd接收芯片組與CIMT編碼器/解碼器和可變數(shù)據(jù)速率（帶CIMT編碼器/譯碼器和變量數(shù)據(jù)速率的1.4 GBd接收器） |
| 文件頁數(shù)： | 18/32頁 |
| 文件大?。?/td> | 346K |
| 代理商： | HDMP-1034 |
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18
HDMP-1034 (Rx) Pin Definition
User Mode Options/Status
Name
RXFLGENB
Pin
22
Type
I-TTL
Signal
Flag Bit Mode Select:
When set high, the RXFLAG bit output is
available to the user as an extra 17th data bit.
Enhanced Simplex Mode Enable:
Enables descrambling of the Flag
Bit encoding. The ESMPXENB pin on the Tx chip must be set to the
same value. This mode should be enabled unless compatibility with
previous versions of G-Link (i.e. HDMP-1022/1012) is desired which
don’t have this feature.
Enable Parallel Automatic Synchronization System:
The parallel
Rx data and control words are read out with REFCLK instead
of the incoming word’s parallel clock. The relative phase of the
parallel output bits is internally adjusted so that they are clocked
out with the rising edge of the REFCLK.
Data Word Available Output:
This output indicates that the Rx
chip word outputs RX[0-15] have a data word.
Control Word Available Output:
This output indicates that the Rx
chip word outputs RX[0-13] have a control word.
ESMPXENB
23
I-TTL
PASSENB
26
I-TTL
RXDATA
44
O-TTL
RXCNTL
43
O-TTL
High-Speed Serial/Parallel I/O
HSIN+
HSIN-
RX[0]
RX[1]
RX[2]
RX[3]
RX[4]
RX[5]
RX[6]
RX[7]
RX[8]
RX[9]
RX[10]
RX[11]
RX[12]
RX[13]
RX[14]
RX[15]
RXFLAG
18
19
3
2
63
62
61
60
59
58
55
54
53
52
51
50
47
46
45
HS_IN
Serial Data Input
O-TTL
Word Outputs
O-TTL
Flag Bit:
If both TXFLGENB and RXFLGENB have been asserted,
this output indicates the value of the transmitted flag bit which
can be used as an extra 17th data bit.
Link Status
RXREADY
4
O-TTL
Receiver Ready:
This signal is asserted when the word alignment
block has seen error-free code field nibbles for 64 up to 128
consecutive words. When ESMPXENB = 1, the toggling of the
scrambled flag bit is also checked. RXREADY is de-asserted
upon 2 consecutive errors in the code field or if the toggling of
the flag bit is absent when ESMPXENB=1.
Received Data Error:
Asserted when a word is received which
does not correspond to either a valid Data, Control, or Idle
Word encoding.
RXERROR
5
O-TTL
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| HDMP-1512 | Fibre Channel Transmitter Chipset(光纖通道傳送芯片) |
| HDMP-1514 | Fibre Channel Receiver Chipset(光纖通道接收芯片) |
| HDMP-1526 | Transistor Diode Kit;Contents Of Kit:Transistor/Diode Kit |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HDMP-1034A | 制造商:HP 制造商全稱:Agilent(Hewlett-Packard) 功能描述:Transmitter/Receiver Chip Set |
| HDMP-1512 | 制造商:AGILENT 制造商全稱:AGILENT 功能描述:Fibre Channel Transmitter and Receiver Chipset |
| HDMP-1514 | 制造商:AGILENT 制造商全稱:AGILENT 功能描述:Fibre Channel Transmitter and Receiver Chipset |
| HDMP1526 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Optoelectronic |
| HDMP-1526 | 制造商:AGILENT 制造商全稱:AGILENT 功能描述:Fibre Channel Transceiver Chip |
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