參數(shù)資料
型號(hào)： GS9092
廠商： Gennum Corporation
英文描述： GS9092 GenLINX-R III 270Mb/s Serializer for SDI and DVB-ASI
中文描述： GS9092 GenLINX - R的第三270Mb / s的串行SDI和DVB - ASI在內(nèi)
文件頁(yè)數(shù)： 46/58頁(yè)
文件大?。?/td> 608K
代理商： GS9092
GS9092 Data Sheet
28202 - 2
September 2005
46 of 58
3.10 Serial Digital Output
The GS9092 contains an integrated current mode differential serial digital output
buffer/cable driver, capable of driving 800mV into two single ended 75
Ω
loads.
Output pins SDO and SDO provide a single differential serial digital output.
Alternatively, two 75
Ω
connections can be driven using single ended drive.
To enable the output, SDO_EN must be set HIGH by the application layer. Setting
the SDO_EN signal LOW will cause the SDO and SDO output pins to become high
impedance, resulting in reduced device power consumption.
With suitable external return loss matching circuitry, the GS9092's serial digital
outputs will provide a minimum output return loss of 17dB.
The output buffer / cable driver uses a separate power supply of +1.8V DC supplied
via the CD_VDD and CD_GND pins.
3.10.1 Output Swing
Nominally, the voltage swing of the serial digital output is 800mV
p-p
single-ended
into a 75
Ω
load. This is set externally by connecting the RSET pin to CD_VDD
through a resistor. The output swing may be adjusted by altering the value of the
RSET resistor.
SMPTE-compliant cable driver operation can be achieved at +1.8V operation by
connecting external pull-up resistors from the differential output to the +1.8V
source.
3.10.2 Serial Digital Output Mute Control
The GS9092 will automatically mute the serial digital output when RESET is LOW.
In this case, the SDO and SDO signals are set to a constant voltage level.
3.11 Programmable Multi-function I/O
The GS9092 has a multi-function I/O port that uses 3 pins, STAT0 through STAT2.
Each pin can be programmed via the host interface to output one of the following
signals: H, V, F, FIFO_FULL, and FIFO_EMPTY (see
Table 3-9
). The pins may
also act as inputs for external H, V and F signals if DETECT_TRS is set LOW.
Alternatively, STAT[2:0] may be set to a high-impedance state.
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