參數(shù)資料
型號： GM5060
廠商： Electronic Theatre Controls, Inc.
英文描述： GRAPHICS PROCESSING IC PROVIDING HIGH QUALITY IMAGES FOR LCD MONITORS
中文描述： 圖形處理芯片提供高品質(zhì)的圖像液晶顯示器
文件頁數(shù)： 73/85頁
文件大小： 1375K
代理商： GM5060
Genesis Microchip
gm5060 / gm5060-H Data Sheet
February 2002
C5060-DAT-01G
65
4.18.1.2. Serial Protocol
A data transfer consists of a stream of serially transmitted bytes formatted as shown in the figure
below. A transfer is initiated (START) by a high-to-low transition on SDA while SCL is held
high. A transfer is terminated by a STOP (a low-to-high transition on SDA while SCL is held
high) or by a START (to begin another transfer). The SDA signal must be stable when SCL is
high, it may only change when SCL is low (to avoid being misinterpreted as START or STOP).
ADDRESS BYTE
SDA
1
2
3
7
8
9
SCL
4
5
6
1
2
8
9
DATA BYTE
ACK
ACK
START
STOP
Receiver acknowledges by holding SDA low
R/W
A6
A1
A2
A3
A4
A5
A0
D6
D7
D0
Figure 54. 2-wire Protocol Data Transfer
Each transaction on the SDA is in integer multiples of bytes (8 bits). The number of bytes that
can be transmitted per transfer is unrestricted. Each byte is transmitted with the most significant
bit (MSB) first. After the eight data bits, the master releases the SDA line and the receiver asserts
the SDA line low to acknowledge receipt of the data. The master device generates the SCL pulse
during the acknowledge cycle. The addressed receiver is obliged to acknowledge each byte that
has been received.
Write Address Increment and Write Address No Increment
The Write Address Increment and the Write Address No Increment mode of operation allows one
or multiple registers to be programmed with only sending one start address. In Write Address
Increment, the address pointer is automatically incremented after each byte has been sent and
written. The transmission data stream for this mode is illustrated below. The highlighted sections
of the waveform represent moments when the transmitting device must release the SDA line and
wait for an acknowledgement from the gm5060 (the slave receiver).
ACK
ACK
ACK
OPERATION CODE
START
SDA
SCL
STOP
DEVICE ADDRESS
REGISTER ADDRESS
DATA
DATA
R/W
ACK
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
9
1
2
9
A8
Register Address MSB
Figure 55. Write Address Increment and Write Address No Inc (0x10 & 0x20)
Read Address Increment and Read Address No Increment
The Read Address Increment and the Read Address No Increment mode of operation allows one
or multiple registers to be read with only sending one start address. In Address Read Increment,
the address pointer is automatically incremented after each byte has been sent. The transmission
protocol for this mode is illustrated below. The highlighted sections of the waveform represent
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