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| 型號： | GM5060 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | GRAPHICS PROCESSING IC PROVIDING HIGH QUALITY IMAGES FOR LCD MONITORS |
| 中文描述： | 圖形處理芯片提供高品質(zhì)的圖像液晶顯示器 |
| 文件頁數(shù)： | 38/85頁 |
| 文件大?。?/td> | 1375K |
| 代理商： | GM5060 |
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Genesis Microchip
gm5060 / gm5060-H Data Sheet
February 2002
C5060-DAT-01G
30
Delayed horizontal sync may be used to solve a potential problem with VSYNC jitter with
respect to HSYNC. VSYNC and HSYNC are generally driven coincidentally, but may arrive at
slightly different times to the gm5060 because of different conditioning at the PCB level. As a
result, VSYNC may be seen earlier or later, or possibly jitter relative to HSYNC. Because
VSYNC is used to reset the line counter and HSYNC is used to increment it, any difference in
the relative position of HSYNC and VSYNC is seen on-screen as vertical jitter. By delaying the
HSYNC a small amount, it can be ensured that VSYNC will always reset the line counter prior to
it being incremented by the “first” HSYNC.
delayed HS placed safely within blanking
active data crosses HS boundary
Data
HS (system)
Internal Delayed HS
Figure 23. Active Data Crosses HSYNC Boundary
4.6.2 DVI Capture Window
DE (Display Enable), HSYNC and VSYNC are synthesized internally (regenerated) by
examining the active regions of each line and compensating for possible source timing errors
and/or embedded HSYNC / VSYNC jitter.
There are two modes of operation available to define the active window for DVI inputs: DE
mode and CREF mode.
DE Capture Mode
- In this mode the AWD considers the display enable (DE) code embedded in
the DVI signal, and uses it explicitly to define the active window. The programmed horizontal
and vertical active start parameters are ignored by the AWD. The horizontal active width and
vertical active length parameters must still be programmed.
CREF Capture
Mode - In this mode the regenerated DE signal is ignored and the active window
is programmed in the same manner as the ADC inputs (See Section 4.6.1.)
4.6.3 ITU-R BT656 Capture Window
The input port extracts the active data, field type, and the horizontal and/or vertical blanking
embedded in the input stream. Note that Cb and Cr (shown in the figure below) correspond to U
and V respectively. The extracted data is converted to 24-bit YCbCr 4:4:4 format.
Horizontal and vertical sync signals required for Input Lock Event timing are internally generated
in this case.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| GM5060-H | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:GRAPHICS PROCESSING IC PROVIDING HIGH QUALITY IMAGES FOR LCD MONITORS |
| GM510K | 制造商:Mallory Sonalert Products Inc 功能描述:Cap Ceramic 51pF 500V SL 10% (6 X 4mm) Radial 6.4mm 85°C 制造商:Cornell Dubilier Electronics 功能描述:CERAMIC CAPACITOR - DISC |
| GM5110 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:XGA/SXGA LCD Controller |
| GM5110-H | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:XGA/SXGA LCD Controller |
| GM5115 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ONPANEL LCD PANEL CONTROLLER |
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