參數(shù)資料
型號(hào): FGH50N6S2D
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: IGBT 晶體管
英文描述: 600V, SMPS II Series N-Channel IGBT with Anti-Parallel StealthTM Diode
中文描述: 75 A, 600 V, N-CHANNEL IGBT, TO-247
文件頁(yè)數(shù): 1/9頁(yè)
文件大?。?/td> 195K
代理商: FGH50N6S2D
2002 Fairchild Semiconductor Corporation
July 2002
FGH50N6S2D RevA2
F
FGH50N6S2D
600V, SMPS II Series N-Channel IGBT with Anti-Parallel Stealth
TM
Diode
General Description
The FGH50N6S2D is a Low Gate Charge, Low Plateau
Voltage SMPS II IGBT combining the fast switching speed
of the SMPS IGBTs along with lower gate charge, plateau
voltage and avalanche capability (UIS). These LGC devices
shorten delay times, and reduce the power requirement of
the gate drive. These devices are ideally suited for high volt-
age switched mode power supply applications where low
conduction loss, fast switching times and UIS capability are
essential. SMPS II LGC devices have been specially de-
signed for:
Power Factor Correction (PFC) circuits
Full bridge topologies
Half bridge topologies
Push-Pull circuits
Uninterruptible power supplies
Zero voltage and zero current switching circuits
IGBT (co-pack) formerly Developmental Type TA49344
Diode formerly Developmental Type TA49392
Features
100kHz Operation at 390V, 40A
200kHZ Operation at 390V, 25A
600V Switching SOA Capability
Typical Fall Time. . . . . . . . . . .90ns at TJ = 125
o
C
Low Gate Charge . . . . . . . . . 70nC at V
GE
= 15V
Low Plateau Voltage . . . . . . . . . . . . .6.5V Typical
UIS Rated . . . . . . . . . . . . . . . . . . . . . . . . . 480mJ
Low Conduction Loss
Device Maximum Ratings
T
C
= 25°C unless otherwise noted
Symbol
BV
CES
I
C25
I
C110
I
CM
V
GES
V
GEM
SSOA
E
AS
P
D
Parameter
Ratings
600
75
60
240
±20
±30
150A at 600V
480
463
3.7
-55 to 150
-55 to 150
Units
V
A
A
A
V
V
Collector to Emitter Breakdown Voltage
Collector Current Continuous, T
C
= 25°C
Collector Current Continuous, T
C
= 110°C
Collector Current Pulsed (Note 1)
Gate to Emitter Voltage Continuous
Gate to Emitter Voltage Pulsed
Switching Safe Operating Area at T
J
= 150°C, Figure 2
Pulsed Avalanche Energy, I
CE
= 30A, L = 1mH, V
DD
= 50V
Power Dissipation Total T
C
= 25°C
Power Dissipation Derating T
C
> 25°C
Operating Junction Temperature Range
Storage Junction Temperature Range
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and
operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. Pulse width limited by maximum junction temperature.
mJ
W
W/°C
°C
°C
T
J
T
STG
Package
JEDEC STYLE TO-247
Symbol
G
C
E
C
E
G
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