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參數資料
| 型號： | FDMS2380 |
| 廠商： | FAIRCHILD SEMICONDUCTOR CORP |
| 元件分類： | 外設及接口 |
| 英文描述： | 740; 38000/740 Series; Microcontroller; Bit Size: 8-bit; ROM: 2K; RAM: 192; ROM Type: QzROM; CPU: 740 core; Minimum Instruction Execution Time (ns): 250 (@8MHz); Operating Frequency / Supply Voltage: 1.8 to 5.5V; Operating Ambient Temperature (°C): -20 to 85; Package Code: PLSP0020JB-A (20P2F-A) |
| 中文描述： | HALF BRIDGE BASED PRPHL DRVR, QCC18 |
| 封裝： | QFN-18 |
| 文件頁數： | 5/15頁 |
| 文件大小： | 388K |
| 代理商： | FDMS2380 |
F
FDMS2380 Rev. A
www.fairchildsemi.com
5
Normal operation
(see figure 1)
STANDBY MODE, INA = INB = 0
In the Standby mode, INA
and INB are in the logic low state and there is no output
current flow through solenoid coil. Both the PDMOS and
NDMOS output power transistors are in their off state. This
is the condition either at the start of a cycle to activate the
solenoid or after a flyback signal has been generated.
EXCITATION MODE, INA = INB = 1
In the Excitation mode,
INA and INB are in the logic high state and the NDMOS
power transistor is turned on to sink current through the coil
connected to the positive supply.
The output current rises in this condition until limited by
either the coil resistance or the FDMS2380 if the current
reaches the output current trip level I
OUT(trip)
in which case
the FDMS2380 will turn off the NDMOS and issue a
protection diagnostic signal.
RECIRCULATION MODE, INA = 1, INB = 0
The
Recirculation mode normally follows the Excitation mode. In
this mode the NDMOS is turned off and the PDMOS is on.
The current in the coil, connected to the output, is re-
circulated to the positive power supply pin through the low
impedance path of the recirculation diode and the PDMOS
transistor. In the Recirculation mode the coil current I
OUT
slowly decays due to the impedance of the inductive load
and the forward voltage drop across the FDMS2380
recirculation path.
The FDMS2380 will also enter the Recirculation mode
during over-voltage, over-current, and over-temperature
conditions as a means to limit the power dissipation in the
device.
FAST TURN-OFF MODE, INA
>
0
The fast turn-off mode
is initiated whenever the INA pin transitions from a logic high
to low state with INB also in a logic low state. In this mode
the output voltage “flies back" to V
BATT
+V
OUT(cl2)
where it is
clamped by the FDMS2380 and the coil current is
recirculated through the device back to the V
BATT
supply.
The larger amplitude flyback voltage causes the coil current
to rapidly discharge shutting off the solenoid. This flyback
condition shall last as long as the output voltage is greater
then V
BATT
and less then V
OUT(cl1)
. During this time, the
output diagnostic pin DIAG is driven low for the duration of
the flyback pulse. Any output flyback pulses which are less
then the period t
DIAGFB(min)
will have its corresponding
diagnostic pulse lengthened to a minimum of t
DIAGFB(min)
to
help identify the flyback condition from a possible protection
diagnostic fault.
If an under-voltage condition exists the flyback diagnostic
pulse will be blocked, however, a flyback diagnostic pulse is
generated if the flyback condition is still present at the end of
the under-voltage condition.
For inputs INA and INB in the logic low state the NDMOS
and PDMOS transistors will be off. Exceptions to this
condition are; during an alternator load dump event that
could drive the output to greater then V
OUT(cl1)
the NDMOS
will clamp the output voltage, and during a flyback event the
PDMOS will clamp the output to V
OUT(cl2)
.
Using the curves from figures 7 through 12, the driving
parameters (e.g., maximum duty cycle, etc.) and/or the
solenoid characteristics (e.g., coil resistance or coil
inductance) must be checked to ensure the FDMS2380 is
not damaged by SCIS (self-clamped inductive switching)
related overstress.
SOFT SHORT TEST MODE, INA = 0 INB = 1
This test mode
is used for detecting an output ground fault. The Soft Short
mode is initiated any time INA=0 and INB=1 when in the
Standby mode. The input conditions need to be held for a
minimum of 2 ms to allow for the timing of the Soft Short
detection circuit. After this setup time the FDMS2380
switches in a resistance (R
SS
) of approximately 75 ohms
between V
BATT
and the output (OUT) pin. This resistance,
connected in parallel to the load, acts as an additional pull-
up impedance to the positive power supply. To minimize
power dissipation in the event of an output ground fault, the
output pull-up resistor, activated in the Soft Short mode, is
only switched on for a period of Tss by the FDMS2380.
Regardless if the INA and INB signals remain in the Soft
Short state for a longer period of time. Immediately prior to
the end of this period, the output voltage V
OUT
is compared
to the V
BATT
supply voltage and if the difference is greater
then V
OUT(ss)
the diagnostic pin DIAG is pulled low. The
diagnostic pin will stay activated until the Soft Short mode is
terminated by a change of the INA or INB inputs.
To minimize the power dissipation the Soft Short test mode
should not be restarted sooner than 10 ms after a previous
Soft Short test.
Self-Protection Functions
Refer to figures 2 through 6 for self-protection waveforms.
All self-protection modes except over-voltage and under-
voltage are reset when INA goes to logic 0. When a self-
protection condition is detected the FDMS2380 will issue a
protection fault on the diagnostic pin. This fault condition is
signaled by a 2
μ
s to 10
μ
s pulse t
DIAG(prot)
on the diagnostic
pin DIAG. If the INA pin is activated while the condition
setting the protection fault is still active additional protection
fault diagnostic pulses will be issued.
Current Trip
(see figure 2) Anytime during Excitation mode,
if the current in the NDMOS rises above the I
OUT(trip)
level,
the FDMS2380 will turn off the NDMOS and enter into the
Recirculation mode and issue a 2
μ
s to 10
μ
s protection fault
pulse on the diagnostic pin DIAG. The device will remain in
this Recirculation mode as long as the INA pin remains high
and is terminated with the falling edge of INA.
Thermal Shutdown
(see figure 3) The FDMS2380 is
internally protected against over-temperature conditions by
a temperature sensing circuit. When the FDMS2380
junction temperature exceeds the protection limit, T
J(tsd)
,
thermal shutdown of the device will occur. Upon entering
thermal shutdown a 2
μ
s to 10
μ
s protection fault signal is
activated in the DIAG pin. In thermal shutdown, the NDMOS
is switched off and the FDMS2380 operates in recirculation
to discharge the energy in the load coil and minimize power
dissipation. The FDMS2380 will remain in this state until INA
is taken to logic 0. A protection fault signal will be issued
each time INA is brought to a logic high while the over-
temperature conditions exists.
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