參數(shù)資料
型號: FDD4685
廠商: FAIRCHILD SEMICONDUCTOR CORP
元件分類: JFETs
英文描述: 40V P-Channel PowerTrench MOSFET -40V -32A 27m ohm
中文描述: 8.4 A, 40 V, 0.042 ohm, P-CHANNEL, Si, POWER, MOSFET
封裝: DPAK-3
文件頁數(shù): 2/6頁
文件大?。?/td> 366K
代理商: FDD4685
F
M
FDD4685 Rev.B
www.fairchildsemi.com
2
Electrical Characteristics
T
J
= 25°C unless otherwise noted
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV
DSS
BV
DSS
T
J
I
DSS
I
GSS
Drain to Source Breakdown Voltage
Breakdown Voltage Temperature
Coefficient
Zero Gate Voltage Drain Current
Gate to Source Leakage Current
I
D
= –250
μ
A, V
GS
= 0V
–40
V
I
D
= –250
μ
A, referenced to 25°C
–33
mV/°
C
V
DS
= –32V, V
GS
= 0V
V
GS
= ±20V, V
GS
= 0V
–1
±100
μ
A
nA
On Characteristics
V
GS(th)
V
GS(th)
T
J
Gate to Source Threshold Voltage
Gate to Source Threshold Voltage
Temperature Coefficient
V
GS
= V
DS
, I
D
= –250
μ
A
–1
–1.6
–3
V
I
D
= –250
μ
A, referenced to 25°C
4.9
mV/°C
r
DS(on)
Static Drain to Source On Resistance
V
GS
= –10V, I
D
= –8.4A
V
GS
= –4.5V, I
D
= –7A
V
GS
= –10V, I
D
= –8.4A, T
J
=125°C
V
DS
= –5V, I
D
= –8.4A
23
30
33
23
27
35
42
m
g
FS
Forward Transconductance
S
(Note 2)
Dynamic Characteristics
C
iss
C
oss
C
rss
R
g
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
V
DS
= –20V, V
GS
= 0V,
f = 1MHz
1790
260
140
4
2380
345
205
pF
pF
pF
f = 1MHz
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
g(TOT)
Q
gs
Q
gd
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
Gate to Source Gate Charge
Gate to Drain “Miller” Charge
V
DD
= –20V, I
D
= –8.4A
V
GS
= –10V, R
GEN
= 6
8
16
27
55
26
27
ns
ns
ns
ns
nC
nC
nC
15
34
14
19
5.6
6.1
V
DD
=–20V, I
D
= –8.4A
V
GS
= –5V
Drain-Source Diode Characteristics
V
SD
t
rr
Q
rr
Source to Drain Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
V
GS
= 0V, I
S
= –8.4A (Note 2)
–0.85
30
31
–1.2
45
47
V
ns
nC
I
F
= –8.4A, di/dt = 100A/
μ
s
Notes:
1:
R
θ
JA
is the sum of the junction-to-case and case-to- ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
R
θ
JC
is guaranteed by design while R
θ
JA
is determined by the user’s board design.
a. 40°C/W when mounted on a 1 in
2
pad of 2 oz copper
2:
Pulse Test: Pulse Width < 30
0
μ
s, Duty cycle < 2.0%.
3:
Starting T
J
= 25°C, L = 3mH, I
AS
= 9A, V
DD
= 40V, V
GS
= 10V.
b. 96°C/W when mounted on a minimum pad.
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