參數(shù)資料
型號： EVAL-ADAU1401EBZ
廠商： Analog Devices Inc
文件頁數(shù)： 6/52頁
文件大?。?/td> 0K
描述： BOARD EVAL FOR ADAU1401
標(biāo)準(zhǔn)包裝： 1
系列： SigmaDSP®
主要目的： 音頻編解碼器
嵌入式： 是，DSP
已用 IC / 零件： ADAU1401
主要屬性： 在 50-MIPS 時的 28/56 位音頻處理器，2 ADC，4 DAC
次要屬性： 均衡，交叉，低音增強，多頻帶動態(tài)處理，延遲等
已供物品： 2 個板，線纜，電源
ADAU1401
Data Sheet
Rev. C | Page 14 of 52
Pin No.
Mnemonic
Type1
Description
34
PVDD
PWR
3.3 V Power Supply for the PLL and the Auxiliary ADC Analog Section. This pin should be
decoupled to PGND with a 100 nF capacitor.
35
PLL_LF
A_OUT
PLL Loop Filter Connection. Two capacitors and a resistor need to be connected to this pin, as
shown in Figure 15. See the Setting Master Clock/PLL Mode section for more details.
36, 48
AVDD
PWR
3.3 V Analog Supply. This should be decoupled to AGND with a 100 nF capacitor.
38, 39
PLL_MODE0,
PLL_MODE1
D_IN
PLL Mode Setting. PLL_MODE0 and PLL_MODE1 set the output frequency of the master
clock PLL. See the Setting Master Clock/PLL Mode section for more details.
40
CM
A_OUT
1.5 V Common-Mode Reference. A 47 μF decoupling capacitor should be connected
between this pin and ground to reduce crosstalk between the ADCs and DACs. The material of
the capacitors is not critical. This pin can be used to bias external analog circuits, as long as
those circuits are not drawing current from the pin (such as when CM is connected to the
noninverting input of an op amp).
41
FILTD
A_OUT
DAC Filter Decoupling Pin. A 10 μF capacitor should be connected between this pin and
ground. The capacitor material is not critical. The voltage on this pin is 1.5 V.
43
VOUT3
A_OUT
VOUT DAC Output. The full-scale output voltage is 0.9 V rms. This output can be used with
either an active or passive output reconstruction filter. See the Audio DACS section for
details.
44
VOUT2
A_OUT
VOUT2 DAC Output. The full-scale output voltage is 0.9 V rms. This output can be used
with either an active or passive output reconstruction filter. See the Audio DACS section
for details.
45
VOUT1
A_OUT
VOUT1 DAC Output. The full-scale output voltage is 0.9 V rms. This output can be used
with either an active or passive output reconstruction filter. See the Audio DACS section
for details.
46
VOUT0
A_OUT
VOUT0 DAC Output. The full-scale output voltage is 0.9 V rms. This output can be used
with either an active or passive output reconstruction filter. See the Audio DACS section
for details.
47
FILTA
A_OUT
ADC Filter Decoupling Pin. A 10 μF capacitor should be connected between this pin and
ground. The capacitor material is not critical. The voltage on this pin is 1.5 V.
1 PWR = power/ground, A_IN = analog input, D_IN = digital input, A_OUT = analog output, D_IO = digital input/output, D_IO/A_IO = digital input/output or analog
input/output.
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