參數(shù)資料
型號(hào)： EVAL-ADAU1401EBZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 22/52頁(yè)
文件大?。?/td> 0K
描述： BOARD EVAL FOR ADAU1401
標(biāo)準(zhǔn)包裝： 1
系列： SigmaDSP®
主要目的： 音頻編解碼器
嵌入式： 是，DSP
已用 IC / 零件： ADAU1401
主要屬性： 在 50-MIPS 時(shí)的 28/56 位音頻處理器，2 ADC，4 DAC
次要屬性： 均衡，交叉，低音增強(qiáng)，多頻帶動(dòng)態(tài)處理，延遲等
已供物品： 2 個(gè)板，線纜，電源
Data Sheet
ADAU1401
Rev. C | Page 29 of 52
The writeback function writes data from the ADAU1401
interface registers to the second page of the self-boot EEPROM,
Address 32 to Address 63. Starting at EEPROM Address 26
(so that the interface register data begins at Address 32), the
EEPROM should be programmed with six bytes—the message
byte (0x01), two length bytes, the chip address (0x00), and the
2-byte subaddress for the interface registers (0x08 0x00). There
must be a message to the DSP core control register to enable
writing to the interface registers prior to the interface register
data in the EEPROM. This should be stored in EEPROM
Address 0. No-op messages (0x03) can be used in between
messages to ensure that these conditions are met.
The ADAU1401 writes to EEPROM Chip Address 0xA0. The
LSBs of the addresses of some EEPROMs are pin configurable; in
most cases, these pins should be tied low to set the address to 0xA0.
The maximum number of bytes that is written back from the
ADAU1401 is 35 (eight 4-byte interface registers plus three
bytes of EEPROM-addressing overhead). With SCL running at
384 kHz, the writeback operation takes approximately 73 μs to
complete after being triggered. Ensure that sufficient power is
available to the system to allow enough time for a writeback to
complete, especially if the WB signal is triggered from a falling
power supply voltage.
Table 20. EEPROM Message Types
Message ID
Message Type
Following Bytes
0x00
End
None
0x01
Write
Two bytes indicating message length followed by appropriate
number of data bytes
0x02
Delay
Two bytes for delay
0x03
No operation executed
None
0x04
Set multiple writeback
None
0x05
Set WB to falling edge sensitive
None
0x06
End and wait for writeback
None
06
75
2-
03
9
0x01
0x00
0x05
0x00
0x08
0x1C
0x00
0x40
WRITE
LENGTH
DEVICE
ADDRESS
CORE CONTROL REGISTER
ADDRESS
CORE CONTROL REGISTER
DATA
0x01
0x001
0x61
0x00
0x04
0x00
WRITE
LENGTH
DEVICE
ADDRESS
PROGRAM RAM ADDRESS
PROGRAM RAM DATA
0x00
0x01
0x00
0xE8
0x01
PROGRAM RAM DATA
0x00
0x01
0x00
0x08
0x00
PROGRAM RAM DATA (CONTINUES FOR 332 MORE BYTES)
0x00
INTERFACE REGISTER DATA
0x00
INTERFACE REGISTER DATA
0x00
INTERFACE REGISTER DATA
0x00
INTERFACE REGISTER DATA
0x03
NO-OP BYTES
0x03
NO-OP BYTES
0x03
0x01
0x00
0x23
0x00
0x08
0x00
LENGTH
DEVICE
ADDRESS
INTERFACE REGISTER
ADDRESS
WRITE
NO-OP BYTES
Figure 28. EEPROM Data Example
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