參數(shù)資料
型號: EDE5108AJBG-8E-E
廠商: ELPIDA MEMORY INC
元件分類: DRAM
英文描述: 512M bits DDR2 SDRAM
中文描述: 64M X 8 DDR DRAM, 0.4 ns, PBGA60
封裝: ROHS COMPLIANT, FBGA-60
文件頁數(shù): 32/77頁
文件大小: 589K
代理商: EDE5108AJBG-8E-E
EDE5108AJBG, EDE5116AJBG
Preliminary Data Sheet E1044E20 (Ver. 2.0)
32
Current state
/CS
/RAS /CAS /WE
Address
Command
Operation
Note
Write recovering
with auto
precharge
H
×
×
×
×
DESL
Nop -> Precharging after tWR
L
H
H
H
×
NOP
Nop -> Precharging after tWR
L
H
L
H
BA, CA, A10 (AP)
READ/READA
ILLEGAL
1
L
H
L
L
BA, CA, A10 (AP)
WRIT/WRITA
ILLEGAL
1
L
L
H
H
BA, RA
ACT
ILLEGAL
1
L
L
H
L
BA
PRE
ILLEGAL
1
L
L
H
L
A10 (AP)
PALL
ILLEGAL
L
L
L
H
×
REF
ILLEGAL
L
L
L
H
×
SELF
ILLEGAL
L
L
L
L
BA, MRS-OPCODE
MRS
ILLEGAL
L
L
L
L
BA, EMRS-OPCODE
EMRS (1) (2)
ILLEGAL
Refresh
H
×
×
×
×
DESL
Nop -> Enter idle after tRFC
L
H
H
H
×
NOP
Nop -> Enter idle after tRFC
L
H
L
H
BA, CA, A10 (AP)
READ/READA
ILLEGAL
L
H
L
L
BA, CA, A10 (AP)
WRIT/WRITA
ILLEGAL
L
L
H
H
BA, RA
ACT
ILLEGAL
L
L
H
L
BA
PRE
ILLEGAL
L
L
H
L
A10 (AP)
PALL
ILLEGAL
L
L
L
H
×
REF
ILLEGAL
L
L
L
H
×
SELF
ILLEGAL
L
L
L
L
BA, MRS-OPCODE
MRS
ILLEGAL
Mode register
accessing
L
L
L
L
BA, EMRS-OPCODE
EMRS (1) (2)
ILLEGAL
H
×
×
×
×
DESL
Nop -> Enter idle after tMRD
L
H
H
H
×
NOP
Nop -> Enter idle after tMRD
L
H
L
H
BA, CA, A10 (AP)
READ/READA
ILLEGAL
L
H
L
L
BA, CA, A10 (AP)
WRIT/WRITA
ILLEGAL
L
L
H
H
BA, RA
ACT
ILLEGAL
L
L
H
L
BA
PRE
ILLEGAL
L
L
H
L
A10 (AP)
PALL
ILLEGAL
L
L
L
H
×
REF
ILLEGAL
L
L
L
H
×
SELF
ILLEGAL
L
L
L
L
BA, MRS-OPCODE
MRS
ILLEGAL
L
L
L
L
BA, EMRS-OPCODE
EMRS (1) (2)
ILLEGAL
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