參數(shù)資料
型號： DV164136
廠商： Microchip Technology
文件頁數(shù)： 93/107頁
文件大?。?/td> 0K
描述： DEVELOPMENT KIT FOR PIC18
產(chǎn)品培訓(xùn)模塊： PIC18 J Series MCU Overview
標(biāo)準(zhǔn)包裝： 1
系列： PIC®
類型： MCU
適用于相關(guān)產(chǎn)品： PIC18F8722，PIC18F87J11
所含物品： 板，線纜，CD，PICkit? 3 個編程器，電源
產(chǎn)品目錄頁面： 659 (CN2011-ZH PDF)
相關(guān)產(chǎn)品： PIC18F87J11-I/PT-ND - IC PIC MCU FLASH 64KX16 80TQFP
PIC18F87J11T-I/PTTR-ND - IC PIC MCU FLASH 64KX16 80TQFP
PIC18F8722T-E/PT-ND - IC PIC MCU FLASH 64KX16 80TQFP
PIC18F8722-E/PT-ND - IC PIC MCU FLASH 64KX16 80TQFP
PIC18F8722T-I/PT-ND - IC PIC MCU FLASH 64KX16 80TQFP
PIC18F8722-I/PT-ND - IC PIC MCU FLASH 64KX16 80TQFP
PIC18F87J11 FAMILY
DS39778E-page 86
2007-2012 Microchip Technology Inc.
CCPR4H
Capture/Compare/PWM Register 4 High Byte
xxxx xxxx
CCPR4L
Capture/Compare/PWM Register 4 Low Byte
xxxx xxxx
CCP4CON
—
DC4B1
DC4B0
CCP4M3
CCP4M2
CCP4M1
CCP4M0
--00 0000
CCPR5H
Capture/Compare/PWM Register 5 High Byte
xxxx xxxx
CCPR5L
Capture/Compare/PWM Register 5 Low Byte
xxxx xxxx
CCP5CON
—
DC5B1
DC5B0
CCP5M3
CCP5M2
CCP5M1
CCP5M0
--00 0000
SSP2BUF
MSSP2 Receive Buffer/Transmit Register
xxxx xxxx
SSP2ADD/
MSSP2 Address Register (I2C Slave mode), MSSP2 Baud Rate Reload Register (I2C Master mode)
0000 0000
SSP2MSK(5)
MSK7
MSK6
MSK5
MSK4
MSK3
MSK2
MSK1
MSK0
0000 0000
SSP2STAT
SMP
CKE
D/A
PS
R/W
UA
BF
0000 0000
SSP2CON1
WCOL
SSPOV
SSPEN
CKP
SSPM3
SSPM2
SSPM1
SSPM0
0000 0000
SSP2CON2
GCEN
ACKSTAT
ACKDT
ACKEN
RCEN
PEN
RSEN/
SEN
0000 0000
GCEN
ACKSTAT
ADMSK5(6) ADMSK4(6) ADMSK3(6) ADMSK2(6) ADMSK1(6)
SEN
CMSTAT
—
—COUT2
COUT1
---- --11
PMADDRH/
CS2
CS1
Parallel Master Port Address High Byte
0000 0000
PMDOUT1H(9)
Parallel Port Out Data High Byte (Buffer 1)
0000 0000
PMADDRL/
Parallel Master Port Address Low Byte
0000 0000
PMDOUT1L(9)
Parallel Port Out Data Low Byte (Buffer 0)
0000 0000
PMDIN1H
Parallel Port In Data High Byte (Buffer 1)
0000 0000
PMDIN1L
Parallel Port In Data Low Byte (Buffer 0)
0000 0000
PMCONH
PMPEN
—
PSIDL
ADRMUX1
ADRMUX0
PTBEEN
PTWREN
PTRDEN
0-00 0000
PMCONL
CSF1
CSF0
ALP
CS2P
CS1P
BEP
WRSP
RDSP
0000 0000
PMMODEH
BUSY
IRQM1
IRQM0
INCM1
INCM0
MODE16
MODE1
MODE0
0000 0000
PMMODEL
WAITB1
WAITB0
WAITM3
WAITM2
WAITM1
WAITM0
WAITE1
WAITE0
0000 0000
PMDOUT2H
Parallel Port Out Data High Byte (Buffer 3)
0000 0000
PMDOUT2L
Parallel Port Out Data Low Byte (Buffer 2)
0000 0000
PMDIN2H
Parallel Port In Data High Byte (Buffer 3)
0000 0000
PMDIN2L
Parallel Port In Data Low Byte (Buffer 2)
0000 0000
PMEH
PTEN15
PTEN14
PTEN13
PTEN12
PTEN11
PTEN10
PTEN9
PTEN8
0000 0000
PMEL
PTEN7
PTEN6
PTEN5
PTEN4
PTEN3
PTEN2
PTEN1
PTEN0
0000 0000
PMSTATH
IBF
IBOV
—
IB3FIB2FIB1F
IB0F
00-- 0000
PMSTATL
OBE
OBUF
—
OB3E
OB2E
OB1E
OB0E
10-- 1111
TABLE 6-5:
REGISTER FILE SUMMARY (PIC18F87J11 FAMILY) (CONTINUED)
File Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Details
on
Page:
Legend:
x
= unknown; u = unchanged; — = unimplemented; q = value depends on condition; Bold = shared access SFRs
Note 1:
Bit 21 of the PC is only available in Serial Programming modes.
2:
Default (legacy) SFR at this address; available when WDTCON<4> = 0.
3:
Configuration SFR, overlaps with default SFR at this address; available only when WDTCON<4> = 1.
4:
Reset value is ‘0’ when Two-Speed Start-up is enabled and ‘1’ if disabled.
5:
The SSPxMSK registers are only accessible when SSPxCON2<3:0> = 1001.
6:
Alternate names and definitions for these bits when the MSSP modules are operating in I2C Slave mode. See Section 20.4.3.2
“Address Masking Modes”
for details.
7:
These bits and/or registers are only available in 80-pin devices; otherwise, they are unimplemented and read as ‘0’. Reset values are
shown for 80-pin devices.
8:
These bits are only available in select oscillator modes (FOSC2 Configuration bit = 0); otherwise, they are unimplemented.
9:
The PMADDRH/PMDOUT1H and PMADDRL/PMDOUT1L register pairs share the physical registers and addresses, but have different
functions determined by the module’s operating mode. See Section 12.1.2 “Data Registers” for more information.
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